A New Poly-Si CMP Process with Small Erosion for Advanced Trench Isolation Process
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A NEW POLY-Si CMP PROCESS WITH SMALL EROSION FOR ADVANCED TRENCH ISOLATION PROCESS.
Naoto Miyashita*, Shin-ichiro Uekusa**, Takeshi Nishioka*** and Satoko Iwami*** * Dept of Electrical and Electronic Engineering, Meiji Univ., Toshiba Co, Semiconductor Company 8, Shinsugita-cho, Isogo-ku, Yokohama 235-8522, Yokohama Japan ** Dept of Electrical and Electronic Engineering, Meiji Univ., Kawasaki Japan *** Mechanical Systems Laboratory, Corporate R&D Center, Toshiba Corporation, 1, Komukai-Toshiba-cho, Saiwai-ku, Kawasaki Japan
ABSTRACT Chemical-Mechanical Polishing has been revealed as an attractive technique for poly-Si of trench planalization. Major issue of the process integration is pattern erosion after over polishing. A new process with silica slurry containing organic surfactant is reported in this paper. A patterned wafer after conventional CMP process is eroded by over polishing, however, the new process conducts small erosion for wide trenches. The organic surfactant is well known as a inhibitor for the protection of poly-Si from alkaline, and the new slurry shows a large pH dependency of the viscosity. The experimental work has been focused on the viscosity, and the mechanism of the small erosion is discussed. This new process should be useful for recessing poly-Si by CMP, because it keeps the erosion level very low.
INTRODUCTION Fine device patterns are formed using CMP techniques in the production of semiconductor devices. Advanced trench isolation technology has been developed and applied to high-speed Bi-CMOS LSI production. Poly-Si CMP technique has made much improvement on the deep trench planarizing process. [1] Major issue of the process integration has been the erosion problem. In this process, dishing has been caused by over polishing in poly-Si CMP process. During poly-Si CMP process, over-polish is necessary to remove all the residual poly-Si globally for the achievement of high degree of the planarity. Due to the high selectivity of poly-Si removal rate to Oxide by typical poly-Si CMP slurry, over-polish inevitably introduces poly-Si dishing in trench structures. The poly-Si dishing in turn causes oxide erosion and active area’s Si3N4 film in the neighboring oxide, attributable to the concentrated cap oxide stress. These stresses introduce many crystal defects. Trench layer should be planarized without dishing on the local scale (distance1000nm) in poly-Si CMP process. However it is difficult to reduce the dishing by the conventional poly-Si CMP technique. Therefore we studied a dishing less new CMP method using high viscosity slurry.
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EXPERIMENTAL Figure1 shows a cross sectional image of the trench isolation pattern. The patterned wafers used in this experiment the test structure especially designed for Poly-Si CMP process development. Trench structure with 4500-5000nm of depth is defined and patterned on Si wafer. Before patterning, 100 nm thick thermal oxide and 70 nm thick Si3N4 layers were grown on Si wafers. LP CVD poly-Si was used for the trench filling. In this trench proces
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