Design of Multi-Bit Delta-Sigma A/D Converters
Design of Multi-Bit Delta-Sigma A/D Converters discusses both architecture and circuit design aspects of Delta-Sigma A/D converters, with a special focus on multi-bit implementations. The emphasis is on high-speed high-resolution converters in CMOS for AD
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DESIGN OF MULTI-BIT DELTA-SIGMA A/D CONVERTERS by
Yves Geerts Alcatel Microelectronics, Belgium
Michiel Steyaert KU Leuven, Belgium
and
Willy Sansen KU Leuven, Belgium
KLUWER ACADEMIC PUBLISHERS NEW YORK, BOSTON, DORDRECHT, LONDON, MOSCOW
eBook ISBN: Print ISBN:
0-306-48015-8 1-4020-7078-0
©2003 Kluwer Academic Publishers New York, Boston, Dordrecht, London, Moscow Print ©2002 Kluwer Academic Publishers Dordrecht All rights reserved No part of this eBook may be reproduced or transmitted in any form or by any means, electronic, mechanical, recording, or otherwise, without written consent from the Publisher Created in the United States of America Visit Kluwer Online at: and Kluwer's eBookstore at:
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Abstract Over the last decade, a vast evolution of communication systems was observed. The enormous popularity and expansion of the internet was a driving force for the development of broadband internet access in every home to cope with the increasing bandwidth requirements for multimedia applications. At the same time, wireless communication evolved from an analog network with large devices, to small and cheap handsets which are based on digital communication standards. The core of all these complex electronic systems consists of digital circuits which have a huge computational power and are implemented in CMOS technologies. The development of ever faster and more powerful digital cores opens the way to more complex systems with increasing demands for the analog part which has to provide an interfacing layer to the outside world. One of the crucial building blocks in the analog part is the Analog to Digital converter. The goal of this work is to present an architecture study of AD converters and to provide insight into a wide range of analog circuit imperfections which can limit the performance. The emphasis is put on high-speed high-resolution converters in CMOS, although the material can also be applied for other specification goals and technologies. The first part of this work takes a closer look at various architectures of AD converters. These range from single-loop to cascaded and various multi-bit topologies. The operation and several stability issues of the converters are discussed. The various topologies are optimized to obtain stable converters with a high accuracy and a clear overview is provided of the maximum achievable performance of each topology. Finally, the linearity problem of the DA converter in the feedback loop of multi-bit converters is discussed, together with possible solutions. The second part studies several design aspects of converters, with a special focus on multi-bit implementations. Various models are provided for a wide range of linear and non-linear circuit non-idealities which can degrade the performance of the converter. These models allow the designer to determine the required specifications for the different building blocks. A power estimation is presented and used to derive several design considerations. The last part
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