Experimental Characterization of frequency-depend electrical parameters of On-Chip Interconnects
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Experimental Characterization of frequency-depend electrical parameters of On-Chip Interconnects Diego M. Cortés Hernández, Mónico Linares Aranda, Reydezel Torres Torres Instituto Nacional de Astrofísica, Óptica y Electrónica (INAOE) Luis Enrique Erro No. 1, Sta. María Tonanzintla, Puebla, C.P. 72000, México [email protected], [email protected], [email protected] ABSTRACT An exhaustive analysis of the frequency-dependent series resistance associated with the on-chip interconnects is presented. This analysis allows the identification of the regions where the resistance curves present different trending due to variations in the current distribution. Furthermore, it is explained the apparent discrepancy of experimental curves with the well-known square-root-of-frequency models for the resistance considering the skin-effect. Measurement results up to 40 GHz show that models involving terms proportional to the square root of frequency are valid provided that the section of the interconnect where the current is flowing is appropriately represented.
INTRODUCTION In each generation of manufacturing process for integrated circuits, the metal layers used for interconnection purposes is increased [1].Moreover, due to the high-data rates presented in current electronic systems, many of these interconnects are routed in a very complex way and are operated at very-high (GHz range) frequencies. Hence, these interconnects must be treated as transmission lines (TL). Traditionally, IC developers were particularly concerned about the series resistance (R) and shunt capacitance (C) presented by a TL, as well as for the number of lumpedcircuit stages required to represent a line of certain length within a given bandwidth [2],[3]. This motivated research oriented to determine and represent these parameters as a function of geometry, frequency (f), and fabrication materials [4]–[6]. In several papers the capacitance (C) and the losses represented by a parallel conductance (G) show a weak dependence on f when the interconnect presents a ground shield [7], [8]. In contrast, R, which is associated with the metal losses occurring along the interconnect is strongly dependent on f and it is expected to be proportional to the square root of f when the skin depth is comparable or less than the thickness of the metal layer [9]. Nevertheless, this ideal trending of R is not evident in the vast majority of the experimental results obtained for onchip interconnects [7], [10]. Many square-root-of-f models have been developed, however these models use fitting parameters to compensate for effects that are still not well explained. For instance, assuming that the series resistance that the interconnect presents at low frequencies introduces a f-independent parameter that is observed even at very high frequencies [5], [9]. On the other hand, as f increases the RC model lacks of accuracy, especially when representing relatively long interconnects such as those used for global networks (e.g. clock distribution) [11]. This paper presents a characterizati
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