Fabrication and Characterization of Poly-Si Schottky-Barrier Thin-Film Transistors
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Fabrication and Characterization of Poly-Si Schottky-Barrier Thin-Film Transistors Horng-Chih Lin, Tiao-Yuan Huang1, Kuan- Lin Yeh1, Rou-Gu Huang1, and Meng-Fan Wang National Nano Device Laboratories, 1001-1 Ta-Hsueh Rd., Hsin-Chu 300, Taiwan; 1 Institute of Electronics, National Chiao Tung University, 1001 Ta-Hsueh Rd., Hsin-Chu 300, Taiwan ABSTRACT Poly-Si Schottky-barrier thin-film transistors (SB-TFTs) were fabricated and characterized. In this study, SB-TFTs were first fabricated by using a conventional sidewall spacer to isolate the gate and S/D regions during salicidation. However, it was found that these SB-TFTs depict very poor on/off current ratio (> 0) highlighting the effectiveness of FID. Detailed analysis on the conduction mechanisms of the leakage current is still in progress. One possible qualitative explanation for the reduction of the off-state current with FID is given in Figure 4. For the conventional device, a high electric field is developed in the channel near the drain side (Figure 4(a)). Such a high field would enhance the field emission as well as thermionic emission of holes from the silicided drain. On the other hand, formation of the FID with the band diagram shown in Figure 4(b) tends to suppress the emission of holes from the drain. As a result, GIDL-like leakage could be eliminated. The proposed novel structure and its fabrication posses many advantages. First of all, all dopings (i.e., including the channel and source/drain) and accompanying annealing steps are eliminated altogether, resulting in a much simplified overall process which is very suitable for low-temperature manufacturing. Second, the new structure is compatible with metal-gate processing, making feasible for the first time a fully implantless CMOS process (by using metal such as TiN as the main-gate material). Third, no additional masking or processing steps is needed in the new structure. This is because the silcidation for forming the Schottky source/drain can be performed simultaneously during the regular salicidation step, while the metal sub-gate can be formed simultaneously with metal interconnect. Fourth, the fully implantless process coupled with the ambipolar operation can greatly simplify CMOS process integration, resulting in an extra low mask-count CMOS flow that is not previously possible. Finally, ambipolar modes of operation with superior characteristics are demonstrated for the first time, due to the unique device structure. The low current required for the sub-gate bias also allows the use of on-chip bias generator to simplify external power supply.
CONCLUSIONS In summary, a novel implantless Schottky barrier thin-film transistor (SBTFT) with silicided source/drain and field-induced drain (FID) extension capable of ambipolar operation is successfully demonstrated and compared with conventional SB-TFTs. We found that while the conventional SBTFTs depict large GIDL-like leakage current and low on/off current ratio of less than 103, the new devices depict GIDL-free current characteristics with on/off cur
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