Ferroelectric Random Access Memory as a Non-Volatile Cache Solution in a Multimedia Storage System
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1129-V10-01-C08-01
Ferroelectric Random Access Memory as a Non-Volatile Cache Solution in a Multimedia Storage System Dong Jin Jung and Kinam Kim Memory Business Division, Samsung Electronics Co. Ltd. San #16, Banwol-Dong, HwasungCity, Gyunggi-Do, S. Korea, 445-701
ABSTRACT We demonstrate that ferroelectric memory is very eligible to become a non-volatile cache solution, in particular, in a multimedia storage system such as solid-state disk. It could provide benefits both of performance and of reliability. In performance, a FRAM cache allows us to rid overhead of power-off recovery. Random WRITE performance has been improved by 250%. In assertion of endurance, we investigate acceleration factors to evaluate cycle-to-failure of the ferroelectric memory both in device-level and in capacitor-level. What has been found is that ferroelectric memory cells have 6.0x1014 of the cycle-to-failure at the operational condition of 85 o C and 2.0V. This cycle-to-failure is well above lifetime READ/WRITE cycles of 9.5x1013 in such system. From 2-dimensional stress simulation, it has also been concluded that the number of dummy cells plays a critical role in qualifying the high temperature life tests. INTRODUCTION There has been enormous improvement in VLSI (very large-scale integration) technology to implement system performance of computing platform in many ways over the past decades. For instance, data throughput of central processing unit (CPU) has been increased by thousand times faster (e.g., several GHz in Quad-core, 2006) than that of Intel 286 (6 MHz) emerged in the beginning of 1980s. Alongside, other important platform, a latest version of dynamic random access memory (DRAM) reaches a clock speed of 1 GHz. By contrast, state-of-the-art HDD (hard disk drive) transfers data at 600 MB/sec around (see figure 1). Note that data rate of the latest HDD is still orders of magnitude slower than the processor/system-memory clock speed. To achieve the throughput performance in more effective way, it is therefore needed to bridge performance gap in between each component. To compensate the gap between CPU and system memory, a CPU cache* has been required and adopted. In this paper, authors are trying to attempt not only how ferroelectric random access memory (FRAM) provides NV-cache solutions in a multimedia storage system such as solid state disk (SSD) with performance benefits but also what should be satisfied in terms of lifetime endurance in such applications. Also, we demonstrate that what integration technology is critical for qualifying high temperature lifetime tests. EXPERIMENT
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system cache is an area of physical memory that stores recently used data as long as possible to permit access to the data without having read from the disk.
150-nm technology has been adopted to integrate an 1T1C FRAM in 64 Mb density, organization of which has 16 IOs. Figure 2 shows micrographic views of cross-sectional images
Figure 1. Evolution of electronic components in data throughput performance. after full integration of the FRA
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