GaSb on Si: Structural Defects and Their Effect on Surface Morphology and Electrical Properties
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GaSb on Si: Structural Defects and Their Effect on Surface Morphology and Electrical Properties Shailesh Kumar Madisetti1, Vadim Tokranov1, Andrew Greene1, Steven Novak1, Michael Yakimov1, Serge Oktyabrsky1, Steven Bentley2 and Ajey P. Jacob2 1 SUNY College of Nanoscale Science and Engineering, Albany NY 12203, U.S.A. 2 GLOBALFOUNDRIES at Albany NanoTech, Albany, NY 12203, U.S.A. ABSTRACT The paper reports on the growth of group III-Sb’s on silicon, substrate preparation, optimization of AlGaSb metamorphic buffer, formation of defects (threading dislocations, microtwins and anti-phase boundaries) and their effect on the surface morphology and electrical properties of these high hole mobility materials for future III-V CMOS technology. Defect density was found to be 2-3x higher than in similar structures grown on GaAs, resulting in 2x higher roughness. Defects also result in background p-type doping well above 1017 cm-3 causing inversion of polarity from n-type to p-type in thin n-type doped GaSb. MOS Capacitors fabricated on these buffers demonstrate similar characteristics to higher quality GaSb-on-GaAs. The highest hole mobility obtained in a strained InGaSb QW MOS channel grown on silicon is ~630 cm2/V-s which is ~30% lower than similar channels grown on GaAs substrates. INTRODUCTION Group III-Sb materials are of growing interest due to their high hole mobility which may enable low power and increased switching speed for future high performance complementary metal-oxide-semiconductor (CMOS) technology. Some of the issues relating to gate dielectric interface quality have been dealt with using different cleaning techniques and employment of a passivation layer to reduce interface trap density [1,2] , growth related issues by buffer optimization on GaAs substrates [3], enhancement of hole mobility by improvements in heterostructure design, strain and band offset [4,5]. But growth optimization of III-Sb on silicon is still a critical issue for realization of all-III-V CMOS circuits utilizing InGaAs n-type channels [6,7] and InGaSb n- or p-type channels [8,9] integrated on a common silicon platform to make the technology commercially viable. Large lattice mismatch ( ~14% for InGaSb, 13% for AlSb 12% for GaSb), thermal mismatch and epitaxial growth transition from non-polar to polar material makes high quality epitaxy challenging due to formation of defects and resultant poor surface morphology. Earlier work has investigated the role of AlSb as an initiation layer for limiting surface migration of Ga atoms for assisting quality 2D growth of GaSb [10,11], InSb quantum dots for defect reduction [12], GaSb/AlSb quantum well growth for mid IR applications [13,14]. EXPERIMENTAL DETAILS Group III-Sb epitaxial structures were grown on Si(001) substrates using a Mod GEN II MBE (Veeco) system equipped with SUMO group-III cells and Sb and As valved crackers. Prior to substrate loading into the MBE system, native oxide was removed with a short HF dip. Si was degassed at 280°C and thermally cleaned at 780°C in the UHV growth cham
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