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Impact of ­HfO2 buffer layer on the electrical characteristics of ferroelectric/high‑k gate stack for nonvolatile memory applications Rajesh Kumar Jha1   · Prashant Singh1 · Upendra Kashniyal1 · Manish Goswami1 · B. R. Singh1 Received: 15 January 2020 / Accepted: 14 May 2020 © Springer-Verlag GmbH Germany, part of Springer Nature 2020

Abstract For the proposed work, the electrical properties of metal–ferroelectric–insulator–silicon (MFeIS) capacitors with ­Sr0.8Bi2.2Ta2O9 (SBT) ferroelectric film deposited on H ­ fO2/Si substrate have been investigated. The SBT film was deposited by RF sputtering and ­HfO2 film by plasma-enhanced atomic layer deposition (PEALD). The structural characteristic of the deposited ferroelectric and dielectric films was obtained using X-ray diffraction and multiple angle ellipsometric analysis. XRD results indicate the polycrystalline and perovskite structure of the SBT film and amorphous structure of the ­HfO2 film annealed at different temperatures. SBT film deposited on the silicon substrate and annealed at 500 °C shows the maximum refractive index of 3.46 with the maximum grain size of 32 nm. Metal/ferroelectric/silicon (MFeS), metal/ferroelectric/metal (MFeM), metal/insulator/silicon (MIS) and metal/ferroelectric/insulator/silicon (MFeIS) structures were fabricated to obtain the electrical and ferroelectric properties. MFeIS structure with 10 nm buffer layer shows the improved memory window of 5 V as compared to the 3.07 V in the MFeS structures. ­MFeI(10 nm)S structure even shows endurance higher than ­1012 read/ write cycles and data retention for more than 8 h. Keywords  Ferroelectric · HfO2 · Memory window · Metal–ferroelectric–insulator–silicon · SrBi2Ta2O9

1 Introduction Continuous dimensional scaling of FLASH and complementary metal–oxide–semiconductor (CMOS) is driving the semiconductor memory technology into a broadening spectrum of new memory devices. New technologies for heterogeneous integration of multiple functions termed as ‘more than moore’ have been emerged to achieve the performance beyond the end of FLASH dimensional and equivalent functional scaling. The concept and architecture of FLASH memory cell were first presented by Dr. F. Masuoka from Toshiba Industries in International Electron Devices Meeting held at San Francisco, CA, USA, in 1984 [1]. Later, in the year 1987, Intel commercially shipped the first-ever FLASH product with an estimated revenue of US$ 1.6 million. It has been more than 30 years, and the NOR/ NAND-based FLASH memory storage has been produced * Rajesh Kumar Jha [email protected] 1



Department of Electronics and Communication Engineering, Indian Institute of Information Technology, Uttar Pradesh, Allahabad 211015, India

commercially by different semiconductor giants such as Samsung, Intel, Sandisk and Toshiba, which exceeded the total market revenue above US$ 35 billion. Over time, the FLASH memory is highly matured, well optimized and mark its significant commercial presence, which makes it as a baseline for the emerging nonvolatile m