Intermetal dielectric process using spin-on glass for ferroelectric memory devices having SrBi 2 Ta 2 O 9 capacitors
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Yang Han Yoon Process Development Thin-Film, Memory R&D Division, Hyundai Electronics Industries Co., Ltd., San 136-1, Ami-ri, Bubal-eub, Ichon-si, Kyoungki-do, 467-701 Korea
Yong Ku Baek, Chang Goo Lee, Chung Won Suh, Seok Won Lee, Young Min Kang, and Nam Soo Kang FeRAM Technology, Memory R&D Division, Hyundai Electronics Industries Co., Ltd., San 136-1, Ami-ri, Bubal-eub, Ichon-si, Kyoungki-do, 467-701 Korea
Cheol Seong Hwangb) and Oh Seong Kwon School of Material Science and Engineering, Seoul National University, San #56-1 Shillim-dong, Kwanak-ku, Seoul, 151-742, Korea (Received 22 May 2000; accepted 13 September 2000)
The degradation behavior of integrated Pt/SrBi2Ta2O9/Pt capacitors caused by hydrogen impregnation during the spin-on glass (SOG)-based intermetal dielectric (IMD) process was investigated. SOG was tested as an IMD since it offers better planarity for multilevel metallization processes compared to other SiO2 deposition methods. It was found that the SOG itself does not degrade the ferroelectric performance. Deposition of an under-layer of SiOxNy by plasma-enhanced chemical vapor deposition (PECVD) using SiH4 + N2O + N2 source gases and a SiO2−x capping layer by another PECVD process using SiH4 + N2O source gases produced hydrogen as a reaction by-product. The hydrogen diffused into the SBT layer and degraded the ferroelectric performance during subsequent annealing cycles. A very thin (10 nm) Al2O3 layer grown by atomic layer deposition before the IMD process successfully blocked the impregnation of the hydrogen. Therefore, excellent ferroelectric performance of the SBT capacitors were maintained after the multilevel metallization process as well as passivation. The adoption of SOG in the IMD process greatly improved the surface flatness of the wafer resulting in a higher capacitor yield with very good uniformity in ferroelectric properties over the 8-in.-diameter wafer.
I. INTRODUCTION
The integration processes used for producing ferroelectric random-access memory (FeRAM) devices generally degrade the ferroelectric performance of ferroelectric capacitors. This is mostly due to hydrogen impregnation during the deposition of intermetal dielectric (IMD) layers and passivation processes in addition to etching damage and mechanical stresses imposed by the various layers on these capacitors.1 Hydrogen-induced
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J. Mater. Res., Vol. 15, No. 12, Dec 2000 Downloaded: 19 Mar 2015
degradation of the ferroelectric Pt/SrBi2Ta2O9 (SBT)/Pt capacitors during FeRAM integration has been reported by the authors2,3 and other researchers.4–6 The production of hydrogen atoms or molecules during back-end processing appears to be inevitable because insulation or protection of the metal lines is obtained from the low temperature SiO2 layers. Low-temperature deposition of the SiO2 layers is usually accomplished by oxidation of SiH4 gas under a plasma atmosphere. Decomposition of the SiH4 gas produces hydrogen. T
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