Kerfless exfoliated thin crystalline Si wafers with Al metallization layers for solar cells
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Rolf Brendel Department of Photovoltaics, Institute for Solar Energy Research Hamelin (ISFH), D-31860 Emmerthal, Germany; and Institut für Festkörperphysik, Leibniz Universität Hannover, D-30167 Hannover, Germany
Sarah Kajari-Schöder Department of Photovoltaics, Institute for Solar Energy Research Hamelin (ISFH), D-31860 Emmerthal, Germany (Received 4 June 2015; accepted 25 September 2015)
We report on a kerfless exfoliation approach to further reduce the costs of crystalline silicon photovoltaics making use of evaporated Al as a double functional layer. The Al serves as the stress inducing element to drive the exfoliation process and can be maintained as a rear contacting layer in the solar cell after exfoliation. The 50–70 lm thick exfoliated Si layers show effective minority carrier lifetimes around 180 ls with diffusion lengths of 10 times the layer thickness. We analyze the thermo-mechanical properties of the Al layer by x-ray diffraction analysis and investigate its influence on the exfoliation process. We evaluate the approach for the implementation into solar cell production by determining processing limits and estimating cost advantages of a possible solar cell design route. The Al–Si bilayers are mechanically stable under processing conditions and exhibit a moderate cost savings potential of 3–36% compared to other c-Si cell concepts.
I. INTRODUCTION
Compared to semiconductor microelectronics, the value added per silicon wafer in crystalline silicon (cSi) photovoltaics (PV) is comparatively low. Thus, the wafer production still accounts for about 30% of the total costs of a Si solar cell module.1 At the same time the price of the polysilicon feedstock, which accounts for half of the wafer costs, is expected to stabilize after a long-lasting drop in prices during the last years.2 Accordingly, the amount of Si used per cell has to be reduced to further diminish wafering costs, which is key for further cost reductions in PV specified by the price learning curve.1 Besides handling limits, the lowest achievable Si consumption is limited by the kerf loss that standard and advanced wire-saw wafering techniques are inevitably accompanied by Kerfless techniques for the production of silicon wafers aim to overcome this constraint and can thus make a substantial contribution to the PV module price reduction. During the last decades, several approaches for kerfless wafering have been developed. Many of them are based
Contributing Editor: Don W. Shaw a) Address all correspondence to this author. e-mail: [email protected] This paper has been selected as an Invited Feature Paper. DOI: 10.1557/jmr.2015.309 J. Mater. Res., Vol. 30, No. 21, Nov 13, 2015
on the introduction of a weaker release layer into a thick solid wafer that can act as a determined breaking point during the lift-off of an upper layer of high quality crystalline silicon. The release layer can be generated below the surface of a high-quality silicon wafer, for instance by implantation of hydrogen ions in the SmartCut3 and PolyMax4 processes or by electrochem
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