Low Temperature Si Dot Thin-Film-Transistor Memory
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ABSTRACT We report a novel poly-Si-thin-film-transistor based memory with Si-nano-crystals (Si dots) floating gate fabricated on a quartz substrate at a temperature below 400'C. Novel techniques of Si-dot and tunnel-oxide formation using excimer laser annealing were performed. A preliminary device shows a threshold voltage shift larger than 1 V with 20 V, 10 ms write/erase (W/E) operation and a retention time of 10i s at room temperature. The device operates 10' W/E cycles without significant degradation. INTRODUCTION Recently, Si nano-crystals have been attracting much attention for their possible application to nonvolatile memories (NVMs). DiMaria[1], Maiti[2] and Dori[3] et al. showed that a Si-rich Si0 2 film in which Si nano-crystals are embedded in a Si0 2 matrix enhances electron injection through the film and that the programming voltage of electrically erasable programmable read-only memories (EEPROMs) can be reduced by using this film as an electron injector to a poly-Si floating gate (FG) of the memories. Tiwari et al. reported an EEPROM with a Si nano-crystal FG[4, 5]. Because lateral conduction between Si nano-crystals to source and drain is negligible compared to that in a conventional continuous poly-Si FG, a Si nano-crystal-based memory is expected to have a longer retention time. Tiwari et al. also reported that the memory operated at a low voltage and over more than 10' write/erase (W/E) cycles. Charges in the continuous FG can flow through leakage paths in Si0 2 connected to the FG at any positions. In a discrete FG consisting of Si nano-crystals, however, Si nanocrystals surrounded by defect-free SiO 2 can store charges, even if some Si nano-crystals surrounded by Si0 2 with defects cannot do so. Therefore, we consider that a memory device with a Si-dot-based FG is promising for NVMs using leaky SiO 2 fabricated at a low temperature. Low temperature processing enables us to use cheap materials such as glass and plastic for a substrate and makes a multi-layer memory structure possible. In this paper, we report a technique to fabricate Si nano-crystals and a memory device based on a poly-Si thin-film-transistor (TFT) with a Si nano-crystal FG at a substrate temperature below 400 °C using excimer laser annealing (ELA). We also discuss the performance of the device. ELA INDUCED Si DOT ARRAY The conventional Si nano-crystal fabrication technique utilizes spontaneous formation of Si islands on a Si0 2 film in the initial stage of chemical vapor deposition of poly-Si[4, 6]. In this process, we need a temperature higher than 1000 °C to make a good thermally grown SiO 2 film and higher than 600 'C to make Si islands. For low-temperature Si nano25 Mat. Res. Soc. Symp. Proc. Vol. 571 © 2000 Materials Research Society
Si dot
PECVD a-Si40 nm S0O2/SiN
buffer layer Quartz substrate
ELA -*I-
Si02
poty-S, 40 nm SiO2_JSN
buffer layer Quartz substrate
Figure 1: ELA induced Si dot formation process.
Figure 2: High resolution TEM image (cross-sectional view) of Si dots after ELA of SiO0. 5 with a fluence o
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