Minimizing and Exploiting Leakage in VLSI Design
Minimizing and Exploiting Leakage in VLSI Design Nikhil Jayakumar, Suganth Paul, Rajesh Garg, Kanupriya Gulati and Sunil P. Khatri Power consumption of VLSI (Very Large Scale Integrated) circuits has been growing at an alarmingly rapid rate. This increase
- PDF / 4,598,404 Bytes
- 228 Pages / 439.37 x 666.142 pts Page_size
- 81 Downloads / 214 Views
Nikhil Jayakumar • Suganth Paul Rajesh Garg • Kanupriya Gulati Sunil P. Khatri
Minimizing and Exploiting Leakage in VLSI Design
123
Nikhil Jayakumar Morse Avenue 1168 94089, Sunnyvale USA [email protected] Dr. Suganth Paul 5701 S. Mopac Expressway Austin TX 78479 #1523 USA [email protected] Dr. Rajesh Garg 6430 NE Alder St. Hillsboro OR 97124 Apt. B USA [email protected]
Dr. Kanupriya Gulati 311 Stasney St. College Station TX 77840 Apt. 1205 USA [email protected] Dr. Sunil P. Khatri Texas A & M University Dept. Electrical & Computer Engineering College Station TX 77843-3128 214 Zachry Engineering Center USA [email protected]
ISBN 978-1-4419-0949-7 e-ISBN 978-1-4419-0950-3 DOI 10.1007/978-1-4419-0950-3 Springer New York Dordrecht Heidelberg London Library of Congress Control Number: 2009939713 c Springer Science+Business Media, LLC 2010 All rights reserved. This work may not be translated or copied in whole or in part without the written permission of the publisher (Springer Science+Business Media, LLC, 233 Spring Street, New York, NY 10013, USA), except for brief excerpts in connection with reviews or scholarly analysis. Use in connection with any form of information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed is forbidden. The use in this publication of trade names, trademarks, service marks, and similar terms, even if they are not identified as such, is not to be taken as an expression of opinion as to whether or not they are subject to proprietary rights. Printed on acid-free paper Springer is part of Springer Science+Business Media (www.springer.com)
To our parents and our teachers
Foreword
Power consumption of Very Large Scale Integrated (VLSI) circuits has been growing at an alarmingly rapid rate. This increase in power consumption, coupled with the increasing demand for portable/hand-held electronics, has made power consumption a dominant concern in the design of VLSI circuits today. Traditionally dynamic (switching) power has dominated the total power consumption of VLSI circuits. However, due to process scaling trends, leakage power has now become a major component of the total power consumption in VLSI circuits. This book presents techniques to reduce leakage, as well as techniques to exploit leakage currents through the use of sub-threshold circuits. This book consists of three parts. In the first part, techniques to reduce leakage are presented. These include an algebraic decision diagram (ADD) based approach to implicitly represent the leakage corresponding to all possible inputs to a combinational design, a heuristic technique to find the minimum leakage vector in the presence of random Process, Voltage and Temperature (PVT) variations using signal probabilities, a low-leakage ASIC design methodology that uses high-VT sleep transistors selectively, a methodology that combines input vector control and circuit modification, and a scheme to find the optimum reverse body bias voltag
Data Loading...
