Low-Power Digital VLSI Design Circuits and Systems
Low-Power Digital VLSI Design: Circuits and Systems addresses both process technologies and device modeling. Power dissipation in CMOS circuits, several practical circuit examples, and low-power techniques are discussed. Low-voltage issues for digital CMO
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LOW-POWER DIGITAL VLSI DESIGN CIRCUITS AND SYSTEMS
by
Abdellatif Bellaouar University of Waterloo and
Mohamed I. Elmasry University of Waterloo
1IiI...
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SPRINGER SCIENCE+BUSINESS MEDIA, LLC
ISBN 978-1-4613-5999-9
ISBN 978-1-4615-2355-0 (eBook)
DOI 10.1007/978-1-4615-2355-0
Consulting Editor: Jonathan Allen, Massachusetts Institute of Technology
Library of Congress Cataloging-in-Publication Data
A c.I.P. Catalogue record for this book is available from the Library of Congress.
Copyright
© 1995 Springer Science+Business Media New York
Originally published by Kluwer Academic Publishers in 1995
Softcover reprint ofthe hardcover lst edition 1995
AlI rights reserved. No part of this publication may be reproduced, stored in a retrieval system or transmitted in any form or by any means, mechanical, photo-copying, recording, or otherwise, without the prior written permission of the publisher, Springer Scie:noe+Business Media. LLC.
Printed on acid-free paper.
CONTENTS
PREFACE 1 LOW-POWER VLSI DESIGN: AN OVERVIEW 1.1 1.2 1.3
1.4
Why Low-Power? Low-Power Applications Low-Power Design Methodology 1.3.1 Power Reduction Through Process Technology 1.3.2 Power Reduction Through Circuit/Logic design 1.3.3 Power Reduction Through Architectural Design 1.3.4 Power Reduction Through Algorithm Selection 1.3.5 Power Reduction in System Integration This Book 1.4.1 Low-Voltage Process Technology 1.4.2 Low-Voltage Device Modeling 1.4.3 Low-Voltage Low-Power VLSI CMOS Circuit Design 1.4.4 Low-Voltage VLSI BiCMOS Circuit Design 1.4.5 Low-Power CMOS Random Access Memory Circuits 1.4.6 VLSI CMOS SubSystem Design 1.4.7 Low-Power VLSI Design Methodology
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1 1
3 4 4
6 7 7 7 7 8 8 9 9 10 10 10
REFERENCES
11
2 LOW-VOLTAGE PROCESS TECHNOLOGY
13
2.1
CMOS Process Technology 2.1.1 N-well CMOS Process 2.1.2 Twin-Tub CMOS Process 2.1.3 Low-Voltage CMOS Technology
13 14 16 17
LOW-POWER DIGITAL VLSI DESIGN
VI
2.2 2.3
2.4 2.5
2.6 2.7 2.8 2.9
Bipolar Process Technology Isolation in CMOS and Bipolar Technologies 2.3.1 CMOS Device Isolation Techniques 2.3.2 Bipolar Device Isolation Techniques CMOS and Bipolar Processes Convergence BiCMOS Technology 2.5.1 Example 1: Low-Cost BiCMOS Process 2.5.2 Example 2: Medium-Performance BiCMOS Process 2.5.3 Example 3: High-Performance BiCMOS Process Complementary BiCMOS Technology BiCMOS Design Rules Silicon On Insulator Chapter Summary
REFERENCES 3 LOW-VOLTAGE DEVICE MODELING 3.1 3.2
3.3
3.4 3.5
MOSFET Structure and Operation SPICE Models of the MOS Transistor 3.2.1 The Simple MOS DC Model 3.2.2 Semi-Empirical Short-Channel Model (LEVEL 3) 3.2.3 BSIM Model (LEVEL 4) 3.2.4 MOS Capacitances CMOS Low-Voltage Analytical Model 3.3.1 Threshold Voltage Definitions 3.3.2 Subthreshold Current 3.3.3 Low-Voltage Drain Current CMOS Power Supply Voltage Scaling Modeling of the Bipolar Transistor 3.5.1 BJT Structure and Operation 3.5.2 Ebers-Moll Model 3.5.3 Bipolar Models in SPICE 3.5.4 Chapter Summary
REFERENCES
21 27 27 31 34 36 37 37 40 43 44 52 56 57 63 63 69 69 73 77 82 84 85 86 87
