Nanoscale Manufacturing Enabled by Imprint Lithography
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Manufacturing Enabled by Imprint Lithography S.V. Sreenivasan
Abstract Imprint lithography has a remarkable patterning resolution of less than 5 nm, and it is simultaneously capable of patterning over large areas with long-range order. This combination enables a broad range of potential applications including terabitdensity magnetic storage, CMOS integrated circuits, and nanowire molecular memory. This article provides a review of the status of imprint lithography for nanoscale manufacturing. First, representative nanoscale devices and their manufacturing requirements are reviewed, along with key patterning challenges that have to be overcome to enable these nanoscale applications. Two classes of top–down nanopatterning techniques, namely, photon-based lithography and proximity mechanical nanopatterning (including imprint lithography), are described, followed by the three primary building blocks of imprint lithography: imprint masks, tools, and materials. Theresults of the lithography process are detailed in terms of process data such as long-range order in the placement and size of the nanostructures, process throughput, and overall cost considerations.
Value of Large-Area Nanopatterning The ability to pattern materials at the nanoscale over large areas is valuable in a variety of applications. In photonics applications, patterning materials at about onetenth of the wavelength of light can lead to photonic crystals for devices such as high-brightness light-emitting diodes (LEDs) (Figure 1)1 and high-contrast polarizers. In magnetic storage, patterning of magnetic materials in the sub-20-nm range (Figure 2)2 is expected to extend the areal density growth in hard-disk drives to well above 1 terabit (Tb)/in.2. In complementary metal oxide semiconductor (CMOS) integrated circuit (IC) fabrication, devices are being fabricated today at about 50-nm half-pitch resolution. For CMOS memory and logic devices, the patterning roadmap extends well below 15-nm half-pitch, as detailed in the 2007 International Technology Roadmap for Semiconductors.3 An example of a sub40-nm memory gate pattern is shown in Figure 3.4 In the area of nanoelectronics,
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recent literature in nanowire molecular memory indicates that ultrahigh-density memory can be fabricated using patterning at the sub-20-nm scale.5 Finally, novel biomedical applications of nanopatterning are being reported, including the recent creation of nanoparticles of controlled size and shape for targeted drug delivery using nanoimprint lithography (Figure 4).6 All of these applications require cost-effective nanopatterning with long-range order over large areas. A more detailed discussion of these nanomanufacturing requirements is provided in the next section.
Nanoscale Manufacturing Requirements A general-purpose nanopatterning approach that can fabricate a variety of nanoscale devices such as the ones discussed in the preceding section would benefit manufacturers in various device areas. Although several nanofabrication
techniques are reported in the literature, only
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