Wafer-Scale, Highly-Ordered Silicon Nanowires Produced by Step-and-Flash Imprint Lithography and Metal-Assisted Chemical
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Wafer-Scale, Highly-Ordered Silicon Nanowires Produced by Step-and-Flash Imprint Lithography and Metal-Assisted Chemical Etching Jian-Wei Ho1,3,4, Qixun Wee2, 4, Jarrett Dumond3, Li Zhang1, 4, Keyan Zang3, Wee Kiong Choi2,4, Andrew A. O. Tay5, and Soo-Jin Chua4,6 1 NUS Graduate School for Integrative Sciences and Engineering, National University of Singapore, Singapore. 2 Singapore-MIT Alliance, National University of Singapore, Singapore. 3 Institute of Materials Research and Engineering, Agency for Science, Technology and Research (A*STAR), Singapore. 4 Department of Electrical & Computer Engineering, National University of Singapore, Singapore. 5 Department of Mechanical Engineering, National University of Singapore, Singapore. 6 Singapore-MIT Alliance for Research and Technology Centre, National University of Singapore, Singapore.
ABSTRACT A combinatory approach of Step-and-Flash Imprint Lithography (SFIL) and MetalAssisted Chemical Etching (MacEtch) was used to generate near perfectly-ordered, high aspect ratio silicon nanowires (SiNWs) on 4" silicon wafers. The ordering and shapes of SiNWs depends only on the SFIL nanoimprinting mould used, thereby enabling arbitary SiNW patterns not possible with nanosphere and interference lithography (IL) to be generated. Very densely packed SiNWs with periodicity finer than that permitted by conventional photolithography can be produced. The height of SiNWs is, in turn, controlled by the etching duration. However, it was found that very high aspect ratio SiNWs tend to be bent during processing. Hexagonal arrays of SiNW with circular and hexagonal cross-sections of dimensions 200nm and less were produced using pillar and pore patterned SFIL moulds. In summary, this approach allows highlyordered SiNWs to be fabricated on a wafer-level basis suitable for semiconductor device manufacturing. INTRODUCTION Silicon nanowires (SiNWs) are one-dimensional semiconducting nanostructures that are advantageous for applications in nano-electronics [1], photovoltaics [2, 3], photodetection [4], chemical and biological sensing [5] and thermoelectrics [6]. The widespread implementation of SiNW devices, however, require practical techniques of producing SiNWs with controlled properties (such as dimensions, electronic qualities and configurations) on a large scale. Si nanostructures have been fabricated using both bottom-up techniques such as vapor-liquid-solid (VLS) growth, and top-down methods such as reactive ion etching (RIE), electrochemical etching and metal-assisted chemical etching (MacEtch). In particular, MacEtch has received considerable attention for several reasons [7]. First, it is a simple and inexpensive technique that does not require expensive equipment. Second, properties such as doping level and type, crystal orientation and quality are determined simply by the starting Si substrate. Third, SiNW physical properties such as cross-section shape and dimensions as well as arrangement can be easily
controlled by pre-patterning of the noble catalytic metal. SiNW height is in t
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