Pore Structure and Integration Performance of a Porous CVD Ultra Low k Dielectric
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Pore structure and integration performance of a porous CVD ultra low k dielectric Youfan Liu1, Andreas Knorr2, Wen-Li Wu3, David Gidley4, and Bernd Kastenmeier5 1
Intel Assignee at SEMATECH, 2Infineon Assignee at SEMATECH, 3NIST, University of Michigan, and 5IBM Assignee at SEMATECH 1 2706 Montopolis Drive, Austin, TX 78741-6499 4
ABSTRACT A porous ultra low k PECVD dielectric has been evaluated at SEMATECH for 45 nm and beyond technology node applications. Material structure, integration performance, and electrical characteristics were investigated in a one level metal single damascene integrated structure. INTRODUCTION For continuous scaling of the semiconductor transistors, ultra low dielectric constant (k) materials will be required for future generation integrated circuit technologies. The integrated dielectric constant, or k effective (keff) for 45 nm and beyond technology nodes is expected to be less than 2.5. The well-known methods to lower the bulk dielectric constant are to introduce porosity and to minimize the atomic bond polarization in dielectric materials. However, integrating porous low k materials into Cu interconnect system has been a very challenging task. The presence of porous structures in low k materials is the fundamental root cause for low k trench sidewall degradation during low k patterning processes. The porous structure also results in mechanically weak low k materials, and the weakness in mechanical strength often leads to adhesive and cohesive failures during Cu/low k integration. Therefore, understanding the pore structures and their impacts on integration performance is essential for tackling the integration challenges. A numbers of various porous ultra low k materials are being evaluated at SEMATECH for 45 nm and beyond technology node applications. Material structure, electrical characteristics, integration performance and integration reliability are characterized and investigated in a single damascene integrated structures. This paper explores the materials characteristics and one level integration performance of an advanced porous ultra low k (~2.1) material, SiCOH based plasma enhanced chemical vapor deposition (PECVD) material. The integration issues associated with the porous dielectric material and integration processes are discussed. EXPERIMENTAL The formation of ultra low k PECVD dielectric films involve mainly two steps: plasma enhanced chemical vapor deposition on a silicon wafer, followed by a cure process (i.e. plasma, UV, or thermal) which burns out porogen templates introduced and yields the porous structure. The film pore structure has been extensively investigated with transmission electron microscopy (TEM), positronium annihilation lifetime spectroscopy (PALS), and specular X-ray reflectivity (SXR) [1], [2], [3]. The dielectric constant was
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determined at 10 kHz with the Hg probe technique and at 100 kHz with metal-insulatorsemiconductor capacitor (MISCAP) testing. Young’s modulus and hardness were measured with nano-indentation. The out-of-plane
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