A fully CMOS true random number generator based on hidden attractor hyperchaotic system

  • PDF / 3,223,402 Bytes
  • 18 Pages / 547.087 x 737.008 pts Page_size
  • 115 Downloads / 186 Views

DOWNLOAD

REPORT


ORIGINAL PAPER

A fully CMOS true random number generator based on hidden attractor hyperchaotic system Ngoc Nguyen · Georges Kaddoum Riccardo Rovatti · Gianluca Setti

· Fabio Pareschi

·

Received: 23 July 2020 / Accepted: 12 October 2020 © The Author(s) 2020

Abstract Low-power devices used in Internet-ofthings networks have been short of security due to the high power consumption of random number generators. This paper presents a low-power hyperchaosbased true random number generator, which is highly recommended for secure communications. The proposed system, which is based on a four-dimensional chaotic system with hidden attractors and oscillators, exhibits rich dynamics. Numerical analysis is provided to verify the dynamic characteristics of the proposed system. A fully customized circuit is deployed using 130 nm CMOS technology to enable integration into N. Nguyen · G. Kaddoum Department of Electrical Engineering, École de Technologie Supérieure (ÉTS), University of Québec, Montreal QC, Canada e-mail: [email protected] G. Kaddoum e-mail: [email protected] F. Pareschi (B) · G. Setti Department of Electronics and Telecommunications, Politecnico di Torino, 10129 Turin, Italy e-mail: [email protected] G. Setti e-mail: [email protected] F. Pareschi · G. Setti · R. Rovatti Advanced Research Center on Electronic Systems (ARCES), University of Bologna, 40125 Bologna, Italy R. Rovatti Department of Electrical, Electronic, and Information Engineering, University of Bologna, 40136 Bologna, Italy e-mail: [email protected]

low-power devices. Four output signals are used to seed a SHIFT-XOR-based chaotic data post-processing to generate random bit output. The chip prototype was simulated and tested at 100 MHz sampling frequency. The hyperchaotic circuit consumes a maximum of 980 µW in generating chaotic signals while dissipates a static current of 623 µA. Moreover, the proposed system provides ready-to-use binary random bit sequences which have passed the well-known statistical randomness test suite NIST SP800-22. The proposed novel system design and its circuit implementation provide a best energy efficiency of 4.37 pJ/b at a maximum sampling frequency of 100 MHz. Keywords True random number generator · Chaos · Hyper-chaos · CMOS · Security

1 Introduction The security of cryptography algorithms highly depends on the randomness of the keys generated from random number generators (RNGs). Most random number generators available today are software-based, which are commonly referred to as pseudo-random number generators (PRNGs). The term “pseudo-random” refers to the random bits generated from a deterministic algorithm in digital computing software. In this context, the generator knows exactly the next state/the next number, while these numbers appear random to the other side. In a true random number generator (TRNG), conversely,

123

N. Nguyen et al.

the computation of the next state/the next number relies typically on a physical process (entropy source) and is unknown un