Combinational Logic Design Using VHDL Constructs
This chapter discusses the RTL coding and synthesis using VHDL for the key combinational arithmetic resources such as adders, subtractors, multipliers, and comparators. This chapter is useful for the beginners to understand about the use of the concurrent
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PLD Based Design with VHDL RTL Design, Synthesis and Implementation
PLD Based Design with VHDL
Vaibbhav Taraate
PLD Based Design with VHDL RTL Design, Synthesis and Implementation
123
Vaibbhav Taraate Pune, Maharashtra India
ISBN 978-981-10-3294-3 DOI 10.1007/978-981-10-3296-7
ISBN 978-981-10-3296-7
(eBook)
Library of Congress Control Number: 2016958476 © Springer Nature Singapore Pte Ltd. 2017 This work is subject to copyright. All rights are reserved by the Publisher, whether the whole or part of the material is concerned, specifically the rights of translation, reprinting, reuse of illustrations, recitation, broadcasting, reproduction on microfilms or in any other physical way, and transmission or information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed. The use of general descriptive names, registered names, trademarks, service marks, etc. in this publication does not imply, even in the absence of a specific statement, that such names are exempt from the relevant protective laws and regulations and therefore free for general use. The publisher, the authors and the editors are safe to assume that the advice and information in this book are believed to be true and accurate at the date of publication. Neither the publisher nor the authors or the editors give a warranty, express or implied, with respect to the material contained herein or for any errors or omissions that may have been made. Printed on acid-free paper This Springer imprint is published by Springer Nature The registered company is Springer Nature Singapore Pte Ltd. The registered company address is: 152 Beach Road, #22-06/08 Gateway East, Singapore 189721, Singapore
Dedicated to my Spiritual Guru, my Teachers and to my Parents
Preface
In the present decade, the complexity of the ASIC and FPGA design has grown rapidly. Due to that there is need of the intelligent and complex devices, and hence the FPGA prototyping area has evolved during this decade. Major FPGA vendors such as XILINX and Altera (Intel FPGA) have come up with the complex FPGAs which are required for design and realization of the system on chip (SOC). During this decade, the era of miniaturization has lot many challenges. The major challenges are to design and deliver the intelligent products for lesser cost, high speed, less area, and less power. Under such circumstances for the idea or product feasibility, the complex FPGAs are used and the complexity of FPGA architecture has grown in the past decade. Even the multiple FPGA designs are used to validate the complex SOCs. For easy understanding of the FPGA designs and ASIC prototyping using FPGAs, this book is organized. This book covers the design for the lower gate count to higher gate count designs. Even this book is written in such a way that it can give information about the VHDL, synthesis, FPGAs, and ASIC prototyping. Chapter 1 of this book discusses the evolution of the logic design, need of HDL, and differences between the
