Hot-wire CVD a-Si:H TFT on Plastic Substrates
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0910-A18-02
Hot-Wire CVD a-Si:H TFT on Plastic Substrates F. Taghibakhsh, and K.S. Karim School of Engineering Science, Simon Fraser University, 8888 University Drive, Burnaby, BC, V5A 1S6, Canada
ABSTRACT Fabrication of hot-wire chemical vapor deposition (HWCVD) of amorphous silicon (a-Si) thin film transistors (TFT) on thin polyimide sheets is reported. A single graphite filament at 1500 °C was used for HWCVD and device quality amorphous silicon films were deposited with no thermal damage to plastic substrate. Top-gate staggered thin film transistors (TFTs) were fabricated at 150°C using hot-wire deposited a-Si channel, plasma enhanced chemical vapor deposition (PECVD) silicon nitride gate dielectric, and microcrystalline n+ drain/source contacts. Low leakage current of 5×10-13 A, high switching current ratio of 1.3×107, and small sub threshold swing of 0.3 V/dec was obtained for TFTs with aspect ratio of 1300µm/100µm. The field effect mobility was extracted to be 0.34 cm2/V.s.
INTRODUCTION Rugged substrates, especially mechanically flexible plastic, are an excellent candidate for future display technology; they are inexpensive, lightweight and durable. On-going research focuses on reducing the TFT fabrication temperature for deposition on plastic substrates where current state-of-the-art a-Si:H TFT technology uses PECVD deposition at 100°C or less [1]. However, hot-wire CVD a-Si:H TFTs have been shown to be superior to traditional PECVD fabricated TFTs with excellent stability, while having high switching current ratios and low leakage currents. High stability devices are particularly important for emerging applications of aSi:H technology that require high TFT duty cycles such as organic light emitting diode (OLED) displays. In addition, HWCVD is a high deposition rate technique (approximately one order of magnitude higher than PECVD), which is easily scalable to large area substrates due to its simple and inexpensive setup [2]. In this research, we present the first HWCVD a-Si:H TFTs fabricated on plastic substrates. Here, the primary challenge lies in minimizing thermal damage to the plastic substrate due to the high thermal radiation from the hot filament (1500°C). A top-gate TFT configuration was employed with a 100 nm intrinsic a-Si:H film deposited by HWCVD of a graphite filament.
EXPERIMENT Thin polyimide sheets (50µm thick, Kapton E5) were cut in 2.5×2.5 cm2 squares, and were mechanically fixed on stainless steel back plates. After outgassing in 150°C in vacuum for
1 hour, the surface of the plastic sheet was passivated with 300 nm PECVD silicon nitride and then coated with 70 nm aluminum, and 25 nm microcrystalline PECVD n+ silicon. Dry and wet etching was used to pattern the two top layers as drain and source contacts. 100 nm hot-wire a-Si film was deposited for active channel later, followed by 250 nm PECVD silicon nitride as the gate dielectric layer. A 300 nm thick aluminum layer was sputtered and patterned as the gate and gate pad. Reactive ion etching was used to complete fabrication by remo
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