Material and Device Parameters Influencing Multi-Level Resistive Switching of Room Temperature Grown Titanium Oxide Laye
- PDF / 7,995,726 Bytes
- 7 Pages / 612 x 792 pts (letter) Page_size
- 68 Downloads / 174 Views
Material and Device Parameters Influencing Multi-Level Resistive Switching of Room Temperature Grown Titanium Oxide Layers P. Bousoulas1, I. Michelakaki1, J. Giannopoulos1, K. Giannakopoulos2, D. Tsoukalas1 1
Department of Applied Physics, National Technical University of Athens, Iroon Polytechniou 9 Zografou, 15780 Athens, Greece 2
Institute of Nanoscience and Nanotechnology, NCSR “Demokritos”, Aghia Paraskevi, 15310 Athens, Greece ABSTRACT We present a detailed study of memory performance of titanium oxide (TiO2-x)-based resistive switching memories by modifying critical parameters of the films involved in the memory stack grown by reactive sputtering at room temperature. The device includes a Ti nanolayer at the Au/TiO2-x interface and it is defined by the following material stack: Au/Ti/TiO2-x/Au/SiO2/Si. We investigate the memory performance optimization of the device in terms of the Ti nanolayer thickness using as a starting point for the TiO2-x growth conditions these identified by varying the ratio of oxygen concentration to argon concentration by our previous results. Due to the superb ability of Ti to absorb oxygen atoms from the dielectric matrix, a large amount of oxygen vacancies is created, which are crucial for the stable function of the memory devices. We observe the existence of an optimum Ti thickness that if further increased gradually degrades the resistive switching behavior. The induced interface oxide thickness is found also to affect the fluctuation of the ON/OFF processes. In terms of electrical performance self-rectifying characteristics were recorded for all samples in the both resistance states. We then demonstrate that at least five-level resistance states could be obtained by modifying the compliance current, exhibiting excellent resistance uniformity and retention capability. The results are supported by C-AFM measurements demonstrating the scaling potential of the large area device discussed above. INTRODUCTION The incessant desire for increased information storage density has pushed both academia and industry into new memory concepts, since conventional memories such as SRAM and FLASH are facing insurmountably scaling issues. Among the various emerging memory concepts [1], Resistance Random Access Memory (RRAM) based on metal oxides seems to gain significant ground in the non-volatile memory race, due to its simple structure that permits aggressive device scaling and compatibility with the mainstream CMOS fabrication technology. The very basic idea of these devices is that can switch from a high resistance state (HRS) to a low resistance state (LRS) under the application of external stimuli (DC voltage sweeps or voltage pulses) and thus produce at least two resistance states which can be used as storage levels. Although resistive switching phenomenon in metal oxides was first reported in the 1960s [2], it was not until 2008 [3], when the interest of the scientific community was rekindled, due to the fabrication of nanoscale crossbar TiO2-x resistive switches. At the same time, whil
Data Loading...
