Micro-uniformity during laser anneal : metrology and physics
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1070-E01-10
Micro-uniformity during laser anneal : metrology and physics W. Vandervorst1,2, E. Rosseel1, R. Lin3, D. H. Petersen3,4, T. Clarysse1, J. Goossens1, P. F. Nielsen3, and K. Churton5 1 IMEC, Kapeldreef 75, Leuven, B3001, Belgium 2 IKS, K.U.Leuven, Celestijnenlaan 200D, Leuven, B3001, Belgium 3 Scion-DTU, CAPRES A/S, Building 373, Kgs. Lyngby, DK-2800, Denmark 4 Dept. of Micro-and Nanotechnology, Technical University of Denmark, DTU Nanotech, Building 345 East, Kgs. Lyngby, DK-2800, Denmark 5 Applied Materials, 974 East Arques Avenue, Sunnyvale, CA, 94085 ABSTRACT Maintaining or improving device performance while scaling semiconductor devices, necessitates the development of extremely shallow (< 20 nm) source/drain extensions with a very high dopant concentration and electrical activation level. Whereas solutions based on RTA with cocktail implants have been proposed in previous generations, sub-45 nm technologies will require even shallower junctions which motivates the research effort on milli-second anneal approaches as these hold the promise of minimal diffusion coupled with high activation levels [1]. Laser annealing is one of these concepts proposed to achieve the junction specifications and is typically described as a msec anneal process. Different from lamp based concepts which illuminate a full wafer simultaneously, the laser has an illuminated area which is much smaller than the wafer size thus necessitating a dedicated scanning pattern. In such a case one is potentially faced with areas subject to multiple overlaps and/or different temperatures and thus issues related to within wafer and within die uniformity need to be addressed. In this work we use optimized metrology to probe such macro- and micro non-uniformity and determine the origin of the various components contributing to the observed non-uniformity patterns (laser stitching patterns, laser beam uniformity, optical path) and their impact on the local sheet resistance. INTRODUCTION One of the major challenges in sub-45nm technologies is the formation of highly active (low resistivity) source and drain regions combined with a very well controlled overlap between junction and gate. As conventional ion implantation followed by rapid thermal annealing (RTA) results in excessive dopant diffusion and limited electrical activation levels, high temperature millisecond annealing is considered as an alternative approach to reach very high (metastable) dopant activation with minimal dopant diffusion. Whereas issues such as final sheet resistance, junction depth, lateral diffusion, defect evolution and junction leakage are of prime importance when assessing the prospects of laser annealing, one can not ignore more manufacturing related issues such as within wafer and within die uniformity as well. These issues are of concern with laser based annealing as one needs to apply a scanning pattern to anneal the entire wafer and thus overlap regions will be inevitable and may induce non-uniformities. Recent studies have indeed identified the impact of thes
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