Pulse Performance and Reliability Analysis of a 1.0 cm 2 4H-SiC GTO
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1246-B08-03
Pulse Performance and Reliability Analysis of a 1.0 cm2 4H-SiC GTO Heather O’Brien1, Aderinto Ogunniyi1, Q. Jon Zhang2, and Anant K. Agarwal2 1 U.S. Army Research Laboratory, 2800 Powder Mill Rd., Adelphi, MD 20783, U.S.A. 2 Cree, Inc., 4600 Silicon Dr., Durham, NC 27703, U.S.A. ABSTRACT A 1.0 cm2 silicon carbide Super-GTO was designed and fabricated for Army pulsed power applications. It is a milestone, being the first SiC Super-GTO of this size. The design is the culmination of several years of research into material improvement, termination and gate patterns, optimizing device size, and calibrating pulse performance. The SGTO’s forward blocking voltage is 9.0 kV, and its on-state voltage is 2.9 V at turn-on. Six devices were evaluated for pulse capability in a high-energy circuit that was designed to produce a 1-ms wide half-sine shaped pulse. The maximum safe operating current for each of the six Super-GTOs varied from 2.2 kA to 3.4 kA, with 13 V being the typical VAK at a current of 3.0 kA. Two of the GTOs were also tested for pulse reliability and repeatability. They were individually switched in the pulse circuit for >500 pulses at very low duty cycle. This study is base-level research on pulse capability of the newest generation of SiC Super-GTOs and as such strives to identify the defining characteristics of an optimal device as well as the predominant modes of device failure. INTRODUCTION To support the development of compact, light-weight, power-dense switches for mobile platforms, the U.S. Army Research Laboratory (ARL) is researching the capabilities of silicon carbide Super-GTOs. The SGTOs evaluated in this study are double the area of the last generation of SiC SGTOs and have roughly 2 kV higher voltage blocking [1]. In the current ARL evaluations, silicon carbide GTOs show wide-pulse (1-ms width) current capabilities with a factor of 1.5 times higher current and 2.5 times higher action compared to similar 3.5 cm2 silicon devices when normalized for footprint area [1]. Compared to silicon power switches, SiC SGTOs show lower voltage drop at very high current densities, leading to lower losses in high-power systems [2]. Silicon carbide’s high current density pulse capabilities and potential for 10-20 kV forward voltage blocking will allow for fewer parallel and series switches and an overall reduction in weight and volume for Army systems [2, 3]. Yield improvement and reduction of device cost in recent years both maintain the attraction toward silicon carbide. With the capability to produce SiC at a micropipe density of 1 cm-2, material developers have shifted their focus to creating thick epilayers with minimal basal plane dislocations (BPDs) [4]. BPDs are understood to create stacking faults which cause detrimental drift in forward voltage, increase in leakage current, and reduction in forward current [5]. The frequency of BPDs in thick epilayers has been reduced by etching the surface of the starting material and, more recently, by using a growth interruption technique to turn up to 98%
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