The Effect of Strain on the Formation of Dislocations at the SiGe/Si Interface
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on the Formation of Dislocations at the SiGe/Si Interface F.K. LeGoues
Introduction Recently much interest has been devoted to Si-based heteroepitaxy, and in particular, to the SiGe/Si system. This is mostly for economical reasons: Si-based technology is much more advanced, is widely available, and is cheaper than GaAs-based technology. SiGe opens the door to the exciting (and lucrative) area of Si-based high-performance devices, although optical applications are still limited to GaAs-based technology. Strained SiGe layers form the base of heterojunction bipolar transistors (HBTs),1 which are currently used in commercial high-speed analogue applications. They promise to be low-cost compared to their GaAs counterparts and give comparable performance in the 2-20-GHz regime. More recently we have started to investigate the use of relaxed SiGe layers, which opens the door to a wider range of application and to the use of SiGe in complementary metal oxide semiconductor (CMOS) devices, 2 which comprise strained Si and SiGe layers. Some recent successes include record-breaking lowtemperature electron mobility in modulation-doped layers where the mobility was found to be up to 50 times better than standard Si-based metal-oxidesemiconductor field-effect transistors (MOSFETs).3'4 Even more recently, SiGebased p-type MOSFETS were built with oscillation frequency of up to 50 GHz, which is a new record, in any p-type material for the same design rule.2 The main stumbling block in developing viable devices utilizing the SiGe system has been the necessity to accommodate the lattice mismatch between Si and Ge. The Si and Ge lattices differ by 4%, resulting in strain in SiGe films 38
grown on Si substrates. This strain can either be stored as strain energy in the film or can be accommodated by a network of misfit dislocations (or other strain-relieving defects) at the interface between the substrate and the film. Some applications (such as HBTs) require maintaining a strained structure while
the others require misfit dislocations. In both cases however, it is important to keep the density of defects in the top layer at a very low level. The acceptable density of defects depends somewhat on the application: For example majority carrier devices can function with as many as 107 dislocations/cm2. On the other hand, minority carrier devices require dislocation densities below 104/cm2. Furthermore, for high reliability, defect levels comparable to those of Si substrates (i.e., close to zero) are preferable. In this article, we review our experimental studies of the different mechanisms for introduction of dislocations into SiGe thin films as a function of the percentage of Ge in the films, which is equivalent to the amount of strain in the film. We have used principally two techniques: traditional "postmortem" cross-sectional transmission electron microscopy (TEM), in which samples are prepared after growth for observations,'"7 and in situ ultrahigh vacuum (UHV) TEM89 where growth is performed in the microscope and observed in real ti
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