Silicon Wafer Defect Self-Characterization with CCD Image Sensors
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Silicon Wafer Defect Self-Characterization with CCD Image Sensors William C. McColgin, Alexa M. Perry, Dean J. Seidler, and James P. Lavine Image Sensor Solutions, Eastman Kodak Company, Rochester, NY 14650-2008, U.S.A. ABSTRACT Today’s CCD image sensors can provide very high image quality. However, used as a tool, they can also provide a sensitive window into defects in silicon, either intrinsic to the starting wafers or introduced during fabrication. In this paper, we examine some cases of known silicon defects and show how they can appear in, and be studied by, CCD imagers. As examples, we discuss epi-layer defects, slip defects, and dark-current rings. INTRODUCTION Defects in a silicon wafer can degrade imager yield, as with any other IC device, by inducing shorts or disrupting patterning so that the imager no longer operates properly. However, some wafer defects can cause “cosmetic” effects, for which the imager functions as intended, but where one or more pixels show aberrant behavior as, for example, with higher-than-average dark current. The sensitivity of CCD imagers to metallic contamination and the quantization of the dark current from atom-counting effects have been previously reported [1-3]. However, extended defects in the silicon, either intrinsic to the starting wafers or introduced during fabrication, may also enhance the dark current, either directly or through decoration with darkcurrent generators. Such defects can then be imaged by the sensors in which they occur; that is, studied electrically at the resolution of the imager pixels. As pixel sizes decrease, extended defects can be examined at ever-higher resolution. In this paper, we use that resolution to examine details of epi-layer defects, wafer slip, and the cause of dark-current rings. EXPERIMENTAL The various imagers used in this work were full-frame image sensors made by Kodak with 13 µm, 6.8 µm, or 5.4 µm pixels. The sensors were built in p-epi on p+ substrates of orientation. Images were captured in the dark at 55 °C, and for extended integration times, to enhance the visibility of the defects. For the epi defect study, the wafers, as received from the vendor, were scanned with a KLA-Tencor Surfscan 6220 for light-scattering defects, which were classified at an optical inspection station. Some defects were monitored throughout the CCD fabrication process. All were characterized at device completion to determine their effects on the imager and on imager dark current. EPITAXIAL LAYER DEFECTS Epitaxial or epi silicon is used in imagers to improve their performance. The epi layer is electrically uniform without the resistivity striations caused by the crystal growth process that are
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present in the substrate. Epi layers are also free of the interstitial or vacancy defects characteristic of CZ silicon ingot growth. Moreover, use of an epitaxial layer allows separation of the properties needed for device performance from properties of the wafer substrate. The substrate can be separately optimized for mechanical and gettering
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