Single-Shot Excimer Laser Annealing and In Process Ellipsometry Analysis for Ultra Shallow Junctions
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Single-Shot Excimer Laser Annealing and In Process Ellipsometry Analysis for Ultra Shallow Junctions T. Noguchi1, G. Kerrien1, T. Sarnet1, D. Débarre1, J. Boulmer1, D. Zahorski2, M. Hernandez2, C. Defranoux2, C. Laviron3, M.-N. Semeria3, 1 Institut d’Electronique Fondamentale (IEF), UMR CNRS 8622, Université Paris-Sud, Bât. 220, 91405 ORSAY Cedex, France 2 SOPRA SA, 26, rue Pierre Joigneaux, 92270 BOIS-COLOMBES, France 3 CEA-DRT/LETI/DTS, 17 Avenue des Martyrs 38054 GRENOBLE CEDEX 9, France
ABSTRACT Single-shot Excimer Laser Annealing (ELA) was performed onto Si surface that was previously B+ implanted with or without Ge+ pre-amorphization. As a result, p+ type USJ (UltraShallow Junction) has been formed. In process analysis, using Infrared Spectroscopic Ellipsometry (IR-SE) has been performed and compared with conventional 4-point probe method. Also, the corresponding crystallinity for the USJ of Si surface has been studied using UltravioletVisible (UV-Vis) Spectroscopic Ellipsometry. In the case of pre-amorphization by Ge+ implantation, the laser energy density threshold required for melting the surface, and therefore for electrical activation, decreased drastically because of the difference in the thermodynamic properties of the amorphized Si. Estimation of the junction depth shows a shallower junction when using UV-SE, as compared to IR-SE. This can be explained by the fact that, in the UV range, the crystallinity of the top layer is predominant while IR-SE is more sensitive to dopant activation. This efficient single-shot ELA is a candidate for the USJ formation for sub-0.1µm CMOS transistors. The effective method for investigating the activation state related to the crystallinity by using UV-SE and IR-SE is expected to apply as a non-contact analytical tool for USJ formation.
INTRODUCTION The sub-0.1 µm transistor has been extensively studied, because it will play a leading role in ULSIs [1, 2]. In order to activate dopants in the silicon layer, Rapid Thermal Annealing (RTA) and Spike RTA are conventional techniques which usually follow ion implantation [3]. These techniques do not meet the International Technology Roadmap for Semiconductors (ITRS) specifications for sub-0.1 µm CMOS technology, which include ultra-shallow Source/Drain extensions (down to 10 nm), very doped (up to 1021 at/cm3) and highly activated (sheet resistance down to 100 Ω/ ) layers with box-like profiles. Other approaches like Gas Immersion Laser Doping (GILD) using a direct doping of the surface with excimer laser and precursor gas have also been reported [4, 5, 6, 7]. As far as GILD is concerned, the present authors (from IEF, SOPRA SA and CEA/LETI) and others have shown that this technique can already meet such specifications [4, 5, 6, 7]. Single-shot Excimer Laser Annealing (ELA) after shallow ion implantation is also a promising technique in place of conventional RTA or advanced RTA for realizing sub-0.1 µm CMOS FETs, with USJ of high drivability that can suppress the Short
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