Stress Enhanced Arsenic Diffusion in Titanium Salicided Junctions by Implantation Into C49 TiSi 2 and Rapid Thermal Anne
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Dong Kyun Sohn, Ji-Soo Park, Jong-Uk Bae, Yun-Jun Hub and Jin Won Park R&D Division, LG Semicon Co. Ltd., I Hyangieong-dong, Hungduk-gu, Cheongju-si361-480, Korea
ABSTRACT We studied reverse leakage current in n+/p titanium-salicided shallow junctions using C49 Ti-silicide as a diffusion source. After Ti deposition, rapid thermal annealing (RTA) was performed to form the C49 Ti-silicide. Subsequently, arsenic ions were implanted and a 2nd RTA was carried out at 850 *Cto form the low resistivity C54 Ti-silicide. In spite of no drive-in process following the 2nd annealing, the implanted As diffused well into Si substrate and the reverse leakage current of the n+/p junctions was reduced to two orders of magnitude lower. Since the high chemical affinity of As to Ti-silicide trapped the dopant in the silicide, it has been known that Ti or Ti-silicide cannot be used as a diffusion source. However, in this work, we found that the C49 Ti-silicide acted as a diffusion source of As ions. The reason of fast diffusivity is attributed to the generation of high tensile stress induced by As implantation. INTRODUCTION Titanium silicide has been widely used in VLSI as gate electrodes, interconnections and contacts, owing to its low resistivity and ability to be used in a self-aligned silicide (salicide) process."2 In conventional salicide schemes, the Ti film is deposited after the formation of source/drain regions.
When a silicide is formed by the reaction between Ti and Si on these
regions, the top of the heavily doped junction is consumed. The amount of silicon consumed ( typically 50 -60 nm thick for 5 Q/sq. or less) is almost comparable to the shallow junction depths of sub-quarter micron devices. Therefore it is difficult to obtain a shallow junction and low-resistance film at the same time.3 The problem is more severe in n+/p junctions with regard to junction leakage than p+/n junctions due to shallower junction depth.' To overcome the limitations of forming Ti-silicided shallow junctions, many works reported a method, 56 implantation of suitable impurity ions through silicide layers followed by drive-in. Unfortunately, the thermal budget by the drive-in process increased the resistance, caused by agglomeration of TiSi 2. 6 ,1 Moreover, the dopant diffusion was not sufficient to form stable source/drain regions. Thus, until now it has been thought that TiSi 2 is an unsuitable diffusion source for shallow junctions. In this work, we report a method for silicided shallow junctions with low sheet resistance. This method uses As implantation into C49 TiSi 2 layers on n+ S/D regions, and subsequent annealing at 850 1C. EXPERIMENTAL P-type 8-inch-diameter (100) Si wafers with a resistivity of 5-9 Q2cm were used in this work. After forming trench isolation and patterning gate, 80 nm sidewall spacers were formed adjacent to the polysilicon gate lines. As ions were implanted into the S/D regions at 30 keV with a dose of 3 × 10 5/cd. A 130 nm-deep junction depth was formed after annealing at 10001C for 10 s. Mat. Res. Soc. Symp. Pr
