Study of Magnetron Sputter Deposition of Metal Gate Electrodes
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0917-E12-05
Study of Magnetron Sputter Deposition of Metal Gate Electrodes Mengqi Ye, Dave Liu, Peijun Ding, Steven Hung, and Khaled Ahmed Applied Materials, Inc., 3050 Bowers Ave., P.O. Box 58039, Santa Clara, CA, 95054 ABSTRACT A systematic study of magnetron sputter deposition of metal gate is presented. On-wafer probes were used to measure ion current and floating voltage. Charge monitoring wafers was used to evaluate charging damage. C-V measurements showed that the interface trap density of metal gated MOS capacitors was reduced with thicker dielectric layer thickness and with the insertion of ALD deposited buffer layer. Lower pressure, higher sputtering power, and pulsed DC sputtering were found to cause larger plasma damage to the ultra-thin dielectric layer, most likely due to increased energetic particle bombardment as a result of higher plasma density and higher ion and neutral energies.
INTRODUCTION The problems of poly silicon gate depletion, high gate resistance, and boron penetration in traditional poly gate become more severe with the continued scaling of gate length and gate oxide thickness in complementary metal-oxide-semiconductor (CMOS) technology, driven by higher performance and circuit density requirements. Metal gate is a promising technology that can overcome these issues and has been researched extensively [1-3]. The major challenges are to find metals with suitable work functions and good thermal stability, and to integrate them into CMOS process. The desirable gate work functions for bulk n- and p- metal-oxide-semiconductor field effect transistors (MOSFET) are at silicon conduction and valence band edge levels respectively. In addition, gate metal deposition can not degrade the ultra-thin gate dielectrics, and the metal gate structure can not be damaged during subsequent high temperature process steps. Magnetron sputtering, with low operation cost, high flexibility and high maintainability, is widely used for metallization applications. Sputtering is more effective for evaluating various metal gate candidates than atomic layer deposition (ALD) or chemical vapor deposition (CVD). However, one of the most challenging problems with sputter deposition is how to prevent the underlying ultra-thin dielectrics from plasma damage during gate electrode deposition processes in order to ensure optimum device performance and reliability [4-7]. In this work, we carried out a systematic study of magnetron sputter deposition of metal gate using both experimental and numerical methods. The effects of charging damage and energetic particle bombardment were evaluated. Capacitance-voltage (C-V) measurement of MOS capacitors was used to evaluate film and device properties [8,9].
EXPERIMENTAL DETAILS MOS capacitors were fabricated on HF last (100) p-type silicon substrate. Silicon oxide films were grown by rapid thermal oxidation, while silicon oxynitride films were prepared by plasma
nitridation of silicon oxide, followed by post-nitridation anneal. The dielectric thickness in this study refers to the t
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