Surface Effects in Silicon Doping with Boron During Proximity Rapid Thermal Diffusion
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influence can mask the effect of surface preparation and lead to misinterpretation of the obtained results. Characterization of the doped layers were performed using sheet resistance measurements, dopant profiling using SIMS, and carrier profiling using spreading resistance or anodic oxidation techniques. Source (SOD) analyses were done for the source wafers using Fourier Transmission Infrared Spectroscopy in a transmission mode. Composition of the glass formed on the surface of the target wafers was analyzed by FTIR operating in a Multiple Internal Reflection mode using 600 Ge crystal'. To increase the resolution of the MIR FTIR measurements we used two identical pieces of the target wafers for surface analyses. RESULTS AND DISCUSSION Doping of the processed wafers depends on the dopant release from the source, gas phase transport and reaction at the silicon surface. The SOD transformation takes place at low baking temperatures before RTD.
Figure I shows FTIR spectra for baking processes at various
temperatures for 60 min. in air.
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Figure 1. FrTR spectra of the SOD baked on a hot plate. To limit the release of water and organic contaminants from the SOD during subsequent RTD we have chosen 600 'C baking processes for 5 min. before all subsequent diffusion experiments. The baking conditions at such high temperature require only a short process time since solvent evaporation is very fast as shown in Figure 2. Sheet resistance (R,) of the doped layers shows typical dependence on diffusion temperature with R, decreasing with increasing temperature. However, since the temperature control during RTP is less accurate than in the furnace processes, due to optical properties of the silicon wafer back sides and due to hardware limitations, we represent some of the sheet resistance results for the target wafers as a function of R, of the source wafers. Both the source and target wafers are assumed to be processed at the same temperature due to the system symmetry, therefore any temperature variation during RTD would be seen in doping of both these wafers. The ratio of the sheet resistance of the target to source wafers represents the efficiency of doping and should be equal to one unless there is limitation of the diffusion due to dopant supply to the processed wafer and/or delay in the glass formation. Figure 3 shows sheet resistance results of the target wafers as a function of R, values for the source wafers. Various cleaning processes were used prior these diffusion steps. 352
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Figure 2. FTIR of the source wafers for the baking processes at 600 *C. Rapid SOD transformation is observed at such high temperature. 200 -r
variations of the Large experimental data is observed for the medium and low levels of the source doping which corresponds to low thermal budget conditions. At low temperatures, the glass formation is slower than
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