The Role of Nanoscale Silicon in Optical Interconnects
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F11.4.1
THE ROLE OF NANOSCALE SILICON IN OPTICAL INTERCONNECTS
PHILIPPE M. FAUCHET Department of Electrical and Computer Engineering University of Rochester, Rochester NY, USA
ABSTRACT The semiconductor industry association roadmap has identified interconnects as a major barrier to progress starting in 2010. Optical interconnects (OI) offer an attractive solution for chip-to-chip communications, however there is no general agreement on how to design them. Eventually, OI may also perform a large amount of intra-chip clocking and signaling, which implies that any chip-to-chip OI system must be designed to be compatible with intra-chip OI, from the points of view of manufacturability, architecture, and device design. We are exploring the use of nanoscale silicon for OI. This paper reports progress toward the demonstration of two basic building blocks of an OI system, namely a Si laser and a Si-based modulator.
I. INTRODUCTION The ever-increasing integration density and operating frequency of electronic chips is causing an electrical interconnect bottleneck to emerge [1]. Today, the overall performance of a multichip computing system is dominated by the limitations of the interconnections between chips and it is predicted that this problem will migrate to the single chip level after one decade. Interconnects are now the major bottleneck not only in terms of limiting performance, such as speed and signal integrity, but also in terms of power use and heat dissipation. Material innovations and traditional scaling will stop satisfying performance requirements when the feature size approaches 50 nm. Without a solution to the “interconnect problem,” the growth of the semiconductor industry may be jeopardized. Finding a solution to this problem is at least as crucial as any breakthrough in individual device performance (e.g., silicon quantum dot transistors) or any revolutionary advance in computing architecture (e.g., quantum computing). What are the major issues with today’s copper interconnects? They are power dissipation, speed limitation, and data integrity. Chips are running hotter and hotter [2], increasingly because of the power dissipated in the copper wires. When the power density exceeds a critical value, water cooling is required, at which point the costs increase prohibitively and mobile applications become impossible. OI offer a clear solution, as light propagating in free space or in waveguides is not absorbed. OI avoid Joule heating along the interconnect, a severe problem since the total length of the interconnections in a chip ranges from 1 to 10 km [1]. Of course, a complete OI system dissipates heat, whether it is generated by the laser light source or the photodetector. Very high-speed signals propagating in copper interconnects are broadened and in general become distorted due to the limited bandwidth available. A well-designed OI can support signals well in excess of 10 GHz, a speed that chip designers are starting to approach and for which copper interconnects are inadequate. Another strong advantag
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