A Gate Breakdown Mechanism in Mesfets and HEMTs
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A GATE BREAKDOWN MECHANISM IN MESFETs AND HEMTs R.J. Trew and T.A. Winslow Electrical and Computer Engineering Department, North Carolina State University, Raleigh, NC 27695-7911 U.K. Mishra Electrical and Computer Engineering Department, University of California at Santa Barbara, Santa Barbara, CA 93106
ABSTRACT A model for gate breakdown in MESFETs and HEMTs is proposed. The model is based upon a combination of thermally assisted tunneling and avalanche breakdown. When thermal effects are considered it is demonstrated that the model predicts increasing drain-source breakdown as the gate electrode is biased towards pinch-off, in agreement with experimental data. The model also predicts, for the first time, the gate current versus bias behavior observed in experimental data. The model is consistent with the various reports of breakdown and light emission phenomena reported in the literature.
I. INTRODUCTION Gate breakdown is important in determining the onset of saturation and the output power capability of microwave field-effect transistors [1-3]. Avalanche breakdown should yield a BVds locus that decreases as the gate is biased towards pinch-off. This is, in fact, the breakdown behavior demonstrated by JFETs. The experimental data for MESFETs and HEMTs, however, generally indicate the opposite behavior [2,3,5,6] (i.e., BVds increases as Vgs is increased towards pinch-off). A model that adequately and accurately explains the measured breakdown performance has not been reported. The avalanche argument leads to inconsistent predictions in comparison with experimental data. For example, an avalanche mechanism is consistent with observation of light emission under breakdown conditions [2,3,5,6,7]. However, the avalanche model does not adequately explain the detailed behavior of the light emission with bias [3]. The avalanche breakdown model also predicts an
Mat. Res. Soc. Symp. Proc. Vol. 241. ©1992 Materials Research Society
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increase in breakdown voltage with temperature, in contrast to the decrease often observed in experimental data. The avalanche model does not predict the observed gate current versus bias voltage behavior under breakdown conditions. The experimental data indicates increasing Ig for increasing Vgs at low drain bias, but decreasing Ig for increasing Vgs at high drain bias, resulting in a 'twist' in the Ig versus Vds characteristic when plotted for varying Vgs. In this report a new thermal/tunnel/avalanche explanation of gate breakdown is presented and it is demonstrated that the new model adequately explains measured data. The new model allows for both tunneling and avalanche breakdown of the gate electrode. Which mechanism dominates is determined by device structure, bias, channel temperature, and operating conditions. The model also provides an explanation for the success of thin surface insulators formed by low temperature MBE growth in producing significantly increased gate breakdown voltages [8-10]. II. THERMALLY ASSISTED TUNNEL LEAKAGE Under normal operating conditions breakdown occ
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