All-2D-Materials-Based Interconnects
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https://doi.org/10.1007/s11664-020-08289-2 Ó 2020 The Minerals, Metals & Materials Society
All-2D-Materials-Based Interconnects MAJID SANAEEPUR
1,2,3
1.—Department of Electrical Engineering, Faculty of Engineering, Arak University, Ar ak 3815688349, Iran. 2.—Institute of Nanosciences and Nanotechnology, Arak University, Ar ak, Iran. 3.—e-mail: [email protected]
Boron nitride (BN) multi-layers are proposed as dielectric material for both horizontal and vertical graphene nanoribbon interconnects. The layer number dependence of the out-of-plane dielectric constant of BN multi-layers is utilized to simultaneously reduce the interlayer dielectric thickness and the crosstalk delay at 7 nm CMOS technology node. Since crosstalk effects are manifested more strongly in denser interconnects, the proposed all-two-dimensional-materials-based interconnection schemes are compared with Cu/ low-k technology in terms of crosstalk delay. Results show that by reducing the interlayer dielectric thickness from 20 nm to 2 nm, the crosstalk delay ratio of the horizontal and vertical graphene nanoribbon interconnects to the Cu/pSiCOH counterparts decreases by 27.06% and 12.86%, respectively. It is also shown that as the interconnect length increases, both horizontal and vertical graphene nanoribbon interconnects with the BN dielectric prove more advantageous than the Cu/low-k counterparts. Key words: 2D materials, graphene nanoribbons, boron nitride, interconnects, low-k dielectrics
INTRODUCTION In the past few decades, the growth of the semiconductor industry has been characterized by continuous downscaling of silicon technology.1 Including an increasing number of transistors in a given surface area has determined a more crucial role for the electrical interconnects in ultra-large-scale integrated (ULSI) circuits. Interconnects strongly affect the overall performance of ULSI circuits by introducing signal integrity issues, delay, reliability problems and power dissipation. As more transistors are inserted in a single chip, due to decreased distance between interconnect lines, crosstalk effects such as crosstalk delay and noise are manifested more strongly. Conventionally, Cu/SiO2 has been used as conductor/dielectric material for IC interconnection.2 In recent years, various low-k dielectric materials and technologies have been utilized to reduce the coupling effects between adjacent interconnects.3,4
(Received March 25, 2020; accepted June 17, 2020)
Although the use of low-k dielectrics mitigates crosstalk effects, at nanoscale, where the lateral dimension of a Cu interconnect becomes comparable to its electron mean free path, new challenges such as a dramatic increase in electrical resistivity5 arise from surface and grain-boundary scattering mechanisms. Furthermore, poor adhesion of Cu to the interlayer dielectrics along with the limits of the present low-k materials imply a need for novel interconnect/dielectric materials and concepts to replace the Cu/low-k technology. Carbon-based materials are the most promising cand
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