An Optimized 300 mm BCB Wafer Bonding Process for 3D Integration
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1249-F09-06
An Optimized 300 mm BCB Wafer Bonding Process for 3D Integration Pratibha Singh1,2, John Hudnall2, Jamal Qureshi3,2, Vimal Kumar Kamineni3, Chris Taylor4,2, Andy Rudack2, Alain Diebold3 and Sitaram Arkalgud2 1 GLOBALFOUNDRIES Inc., Albany, New York; 2 SEMATECH, Albany, New York; 3 College of Nanoscale Science and Engineering, SUNY, Albany, New York; 4 Hewlett-Packard Company, Corvallis, Oregon. ABSTRACT Wafer bonding using benzocyclobutene (BCB) has been discussed in the past for threedimensional (3D) integration. This paper reports the development and characterization of a manufacturable BCB bonding process for 300 mm wafers using standard 300 mm tools. A systematic optimization approach has been developed to characterize the bulk properties of the BCB film that can be applied to various integration schemes. We specifically discuss one such application—handle wafer bonding. BCB bonding for a range of cross-linking levels has been investigated. The cross-linking level of BCB before bonding is determined using an infrared (IR) variable angle spectroscopic ellipsometer (VASE) technique. The impact of the BCB film preparation and bonding condition on bond quality is characterized using scanning acoustic microscopy (SAM) , IR microscopy, a razor blade test, and four-point bend methods. Based on the results, an optimum cross-linking level for BCB film before bonding was determined for 300 mm wafers to obtain void-free and dendrite-free bonds. Wafers bonded using the optimized BCB process conditions have successfully sustained backgrinding, dry thinning, and standard BEOL metallization steps. INTRODUCTION Three-dimensional (3D) integrated circuit (IC) technology consists of stacking ICs and connecting them vertically. Replacing long horizontal metal lines with short vertical interconnects can help improve electrical performance by addressing issues of resistancecapacitance (RC) delay, power consumption, and crosstalk. It can also enable heterogeneous integration by stacking different technology devices like RF, memory, logic, sensors etc. Higher form factor by stacking ICs is another potential advantage. As is obvious from the above examples, wafer bonding technology is one of the key enablers for realistic and successful 3D IC manufacturing [1][2]. Several schemes for 3D IC integration have been presented in the literature. All of these schemes need a handle wafer bonding process to enable wafer thinning and stacking. In this paper, we will discuss optimizing the handle wafer bonding process with BCB as the adhesive material and using 300 mm wafers and tools. The characterization techniques and issues with BCB bonding that we describe can be extended to other integration schemes where BCB is used as a hybrid die-to-wafer (DtW) bonding material or as an underfill material to provide mechanical strength as well as insulation.
3DIC INTEGRATION AND BCB BONDING Figure 1 shows an illustration of our 3D integration scheme. Through silicon vias (TSVs) with a 5 µm diameter are patterned using an oxide hardmask. The
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