Channel Reliability in MOSFETs with Gate Oxide Grown using ECR Plasma of O2/He
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0989-A05-09
Channel Reliability in MOSFETs with Gate Oxide Grown using ECR Plasma of O2/He Vishwas Jaju, and Vikram Dalal Electrical and Computer Engr., Iowa State University, Coover Hall, Ames, IA, 50011 ABSTRACT In this paper we present the channel degradation properties of MOSFET with gate oxide grown using electron cyclotron resonance (ECR) plasma. Si was oxidized using ECR plasma of 10% O2/He at 450oC for 60 min. To evaluate the electrical properties, MOS and MOSFETs devices were fabricated using ECR grown oxide as a gate oxide. We found that the n-MOSFET with as-grown ECR oxide shows higher hot carriers induced channel degradation. It was approximately two orders of magnitude higher compared to the channel with thermally grown (at 950oC) dry oxide. When as-grown oxide was annealed at much higher temperature (~800oC), channel resistance for the hot carriers improved and became comparable to that of the thermally grown oxide. We think that because of the lower processing temperature used during plasma oxidation there are many nonbridging O atoms and also strain is present in Si-O bonds. Annealing at higher temperatures connects these O atoms with Si to form Si-O bonds and rearrangement of atoms could relieve strain. This assumption was found be self-consistent with the infrared absorption study presented in this paper. INTRODUCTION As the device dimensions are shrinking, high temperatures used during thermal oxidation and annealing are posing new challenges. Device quality thermal oxide is usually grown in the range of 900oC-1100oC. High temperature processes could redistribute the dopants profile in Si and could induce stresses between the different layers on Si wafer [1,3,9]. Thus there has been always a need of low temperature (875 G) required for ECR condition. Substrate holder is made up of Inconel alloy and could be heated up to 900oC. Substrate was kept perpendicular to the magnetic field axis and was electrically isolated from rest of the reactor. Distance of sample from the source was ~20 cm. 10% O2/He gaseous mixture was used for oxidation and it was introduced into the reactor via a shower ring present just after the quartz window. Temperature Control
Langmuir Probe
Substrate bias
Magnetic coils
Substrate holder
Stub tuners
Si wafer
To turbo pump
Quartz applicator Gas input shower
Input microwave power
Figure 1: Schematic diagram of the ECR reactor
Sample Preparation 3-inch Si wafers of orientation and p-type doping (Boron, 0.1-0.07 ohm-cm) were used. Wafers were cleaned using standard RCA process and prior to loading they were dipped in HF solution to remove any native oxide present. Pressure below 1x10-6 T was achieved before heating the wafer to the desired temperature. MOSFET of dimension 5 µm x 40 µm (L x W) and MOS devices 100 µm x 100 µm were fabricated using Al as the gate metal. Aluminum was thermally evaporated and deposited (~250 nm thick) on the oxide.
Thicknesses of the oxide layers were measured using an Ellipsometer. High frequency (at 1 MHz frequency) capacitance-voltage
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