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Characteristics of Memory Window and Retention Properties of One Transistor Memory Devices Tingkai Li, Sheng Teng Hsu, Bruce Ulrich and Dave Evans Sharp Laboratories of America, Inc, 5700 NW Pacific Rim Blvd. Camas, WA 98607 ABSTRACT Pb3Ge5O11 (PGO) metal-ferroelectric-metal-oxide-semiconductor (MFMOS) and metalferroelectric-oxide-semiconductor (MFOS) one-transistor ferroelectric memory devices have been fabricated. The memory windows of the memory transistors can be characterized in terms of MFMOS or MFOS capacitor and the threshold voltages of the transistor. The retention properties of one-transistor memory devices can be measured from the changes of the capacitance of MFMOS or MFOS capacitors. Alternatively the retention properties can be evaluated from the threshold voltages or drain currents of the transistor with retention time. There are inconsistencies between the capacitor data and the transistor data. In this paper, we present the memory windows and retention properties of MFOS and MFMOS one-transistor memory devices measured with various methods. The different results obtained from various methods and device structures will be discussed. INTRODUCTION Ferroelectric-gate controlled devices, such as the metal-ferroelectric-silicon field-effect transistor (MFS) FET, were studied as early as the 1950s [1-4]. There have been several groups of investigators actively researching ferroelectric-gate controlled memory transistors in recent years [5-10]. For one-transistor memory devices, the memory windows and retention properties are the most important parameters. There are many methods to measure the memory windows and retention properties [10-12]. In general, the memory windows of one-transistor memory devices can be characterized from the threshold voltages in terms of MFMOS or MFOS capacitor and the transistor devices. The retention properties of one-transistor memory devices can be measured from the changes of the capacitance of MFMOS or MFOS capacitors. Alternatively the retention properties can be evaluated from the drain current of the transistor. Because only a few groups have made working one-transistor memory devices, many researches are still working at MFOS and MFMOS capacitors for one-transistor memory device applications. Experimental results show that there are inconsistencies between the capacitor data and the transistor data. In this paper, we present the memory windows and retention properties of MFOS and MFMOS one-transistor memory devices measured with various methods. The different results obtained from various methods and device structures will also be discussed. THE MECHANISM OF ONE TRANSISTOR MEMORY DEVICES The basic operation mechanism of MFOSFET memory transistors is depicted in Fig. 1. The MFMOSFET memory devices have the similar operation mechanism. When the ferroelectric material is poled towards the gate electrode, positive charges are induced at the channel. The threshold voltage of the transistor is very large. The transistor is programmed to the "off" state ("0" state). On the oth