Charging effect of a nc-Si in a SiO 2 layer observed by scanning probe microscopy
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Charging effect of a nc-Si in a SiO2 layer observed by scanning probe microscopy J. M. Son1, J. M. Kim2, Y. Khang3, E. H. Lee3, S. I. Park4, Y. S. Kim2, and C. J. Kang1,* 1 Department of Physics, Myongji University, Yongin, Gyeonggi-do 449-728, Korea 2 Department of Physics, Myongji University, Yongin, Gyeonggi-do 449-728, Korea 3 Devices Lab, Samsung Advanced Institute of Technology, Yongin, Gyeonggi-do 449-712, Korea 4 PSIA corp. Induspia 5F, Sang-Daewon-Dong 517-13, Sungnam, Gyeonggi-do 462-120, Korea *email: [email protected] ABSTRACT Scanning probe microscopy (SPM) with a conducting tip has been used to electrically probe silicon nanocrystals (NCs) on an insulating substrate. NC samples were produced by aerosol techniques followed by a sharpening oxidation. The size of NCs is in the range of 10-50nm and deposited on a silicon substrate with a density of around 1011/cm2. Using a conducting tip, the charge was injected directly into the NCs, and the bias dependent images due to the trapped charges in the NCs were monitored. Charging effects affected by the size of NCs and injection direction were also estimated from the apparent height differences of the NCs with respect to the applied bias.
INTRODUCTION In memory devices, the expanding capabilities for nanoscale fabrication have attracted a great interest. Recently, many studies were carried out on the floating gate nonvolatile memories (NVMs) of which the relatively large conventional floating gate are replaced with a two-dimensional array of small, isolated nanoscale particles embedded in the gate oxide. Such structures have been demonstrated using Si NCs in a conventional floating gate memory configuration [1-4]. Furthermore, this structure for charge storage devices has several advantages such as better retention [5], enabling thinner tunnel oxide resulting in lower operating voltage, allowing shorter channel length with reduced punch through and consequently a smaller cell area, suppressed leakage current. In general, these devices exhibit a distribution of charge transit times during charging of an ensemble of NCs. However, the physical and electrical reasons for this behavior are not completely understood, but could be related to the electrical properties of the oxide, interface states in the NCs, or local variation of the electronic energy levels for charging or discharging of NCs caused by the uncontrolled physical variables such as size or shape during the process. Thus it is important to characterize the properties of isolated single NC. In order to understand the electronic properties, SPM was performed with a conducting tip [6-19]. In most cases, people used SPM images to spatially correlate with the topographic data and point-spectroscopy to measure many physical properties of semiconductor devices such as local dopant density, non-uniform distribution of impurities [11,14,15,18]. But nowadays, usefulness of these tools and techniques have been reaching to new applications such as, investigation on charge trapping-detrapping dynamics, elect
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