Effect of Polymer Gate Dielectric Surface Viscoelasticity on Pentacene Thin-Film Transistor Performance

  • PDF / 311,613 Bytes
  • 6 Pages / 612 x 792 pts (letter) Page_size
  • 1 Downloads / 228 Views

DOWNLOAD

REPORT


1091-AA11-50

Effect of Polymer Gate Dielectric Surface Viscoelasticity on Pentacene Thin-Film Transistor Performance Choongik Kim, Antonio Facchetti, and Tobin J. Marks Chemistry, Northwestern University, 2145 Sheridan Road, Evanston, IL, 60208-3113 ABSTRACT Pentacene is one of the most studied semiconductor for organic thin-film transistors (OTFTs), and enhanced understanding of pentacene-based TFTs has significantly advanced the organic electronics. We report here the crucial effect of the polymer gate dielectric glass transition temperature (Tg) on pentacene film growth mode, microstructure, and the resulting TFT performance. Nanoscopically-confined thin polymer films are known to exhibit reduced glass-transition temperatures versus the corresponding bulk values, and we demonstrate here that pentacene films grown on polymer gate dielectrics at temperatures well below their bulk Tg exhibit morphological/microstructural transitions and OTFT performance discontinuities at welldefined growth temperatures [defined as the surface Tg, or Tg(s)] characteristic of the underlying polymer structure and independent of the film thickness. The results argue that realistic OTFT response must take into account this fundamental polymer property, and that TFT measurements represent a new probe of polymer surface thermal properties. INTRODUCTION Organic thin-film transistors (OTFTs) have attracted considerable attention for applications in low-cost/disposable electronics, such as memory elements, displays, and sensors.1 Enabling these technologies will require significant improvements in OTFT performance, hence in the properties of printing-compatible materials such as plastic substrates, polymeric insulators, and solution-processable molecular/polymeric semiconductors. To achieve this goal it is required to understand and control over parameters affecting the nature of critical device charge transporting interfaces. One successful strategy for a given semiconductor/conductor materials set and device configuration is to manipulate the semiconductor-insulator interfacial properties via varying the gate insulator.2 To this end, polymer insulators are of great interest for their diverse properties and capacity to tune insulator surface properties, hence interfacial trap state densities.3 Indeed, it has been shown that applying a polymeric layer on top of a SiO2 gate insulator significantly enhances OTFT performance versus that of the bare gate insulator. Nevertheless, fundamental questions remain regarding how organic semiconductor growth on polymer gate insulators affect film and interface microstructure, OTFT device performance, whether these effects are intrinsic properties of the semiconductor and/or are strongly related to insulator structure, and how this behavior differs from that of conventional inorganic insulators (e.g., SiO2). The glass transition temperature (Tg) of amorphous materials is a well-known property of great technological importance, although its origin and mechanism remain unclear. Amorphous polymeric material