Energy landscape models for conduction and drift in phase change memory
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Energy landscape models for conduction and drift in phase change memory D. Ielmini*, D. Fugazza and M. Boniardi Dipartimento di Elettronica e Informazione and IU.NET, Politecnico di Milano, Piazza L. da Vinci, 32 – 20133 Milano, Italy. *Email: [email protected] ABSTRACT The physical modeling of carrier conduction and material-related effects such as crystallization, structural relaxation (SR), electromigration and ion migration in chalcogenide materials is a key challenge toward the development and scaling of phase change memory (PCM) devices. In particular, future scaling to 10 nm and below may require addressing variability effects in the programming, switching and retention properties of the cell. Variability is deeply linked with the nanometer-scale fluctuations of potential, atomic structure and material composition that affect conduction, structure relaxation and crystallization. Therefore, the physical modeling of conduction and reliability in PCM devices requires energy landscape models, describing the random fluctuations of e.g. the potential energy dictating the carrier transport and the free energy controlling the atomic rearrangement of the amorphous chalcogenide structure. This work discusses energy landscape models for a physical description of (i) electrical conduction in the amorphous phase and (ii) SR responsible for resistance drift in the amorphous chalcogenide phase. The link between the effective energy barrier in conduction and relaxation will be clarified, and analytical models for the prediction of drift depending on time and temperature will be introduced. These models provide the first comprehensive approach for a physics-based prediction of resistance window, resistance drift and their corresponding statistical variability within large PCM arrays. INTRODUCTION The phase change memory (PCM) is attracting increasing interest as a disruptive technology to replace high-performance NOR Flash and dynamic random access memory (DRAM). PCM has reached a high technological maturity, as compared to other emerging, nonSi-based memory concepts. PCM arrays of 1Gb have been demonstrated in technologies of 58 nm [1] and 45 nm [2]. Three dimensional PCM demonstration vehicles have also been developed, by the use of polysilicon diode selector [3] and phase-change memory and switch (PCMS) concept, relying on a chalcogenide-based ovonic switch as the select device [4]. Despite the large progress in integration and manufacturability, the understanding of material and device physics remains a high priority for the development and the scaling of future PCM devices. One of the key issues for PCM scaling is the intrinsic size-dependence of critical material parameters. The scaling laws for the resistance window [5, 6], the threshold voltage [5, 7, 8], the crystallization time [9, 10] and the reset current [11, 12] have been addressed, allowing for a physically-based prediction of device performance in future generations. On the other hand, a physical description of variability of crucial PCM parameters have b
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