Threshold voltage drift in phase change memories: scaling and modeling
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Threshold voltage drift in phase change memories: scaling and modeling N. Ciocchini, M. Cassinerio, D. Fugazza and D. Ielmini DEI, Politecnico di Milano and IU.NET, 20133 Milano, Italy, Tel. +39 02 2399 4007, Email: [email protected] ABSTRACT The phase-change-memory (PCM) relies on the ability of a chalcogenide material, usually Ge2Sb2Te5 (GST), to switch from the amorphous phase with a high electrical resistance (~MΩ) to a crystalline phase with a low electrical resistance (~kΩ). The structural stability of the amorphous phase is critically affected by temperature-activated crystallization and resistance drift due to structural relaxation (SR) [1]. While amorphous chalcogenides are relatively stable with respect to crystallization, thanks to a high activation energy above 2 eV [2], the lower activation energy of SR can strongly affect the PCM electrical properties of the amorphous phase, including resistance, activation energy for conduction and, most importantly, the threshold voltage VT. The latter marks the boundary between read and programming operations in PCM, thus VT instability must be carefully predicted to minimize read disturbs within the array. To this purpose, understanding the switching mechanisms and modeling of VT is of utmost importance for PCM device development and scaling. INTRODUCTION In this work, the threshold voltage VT in PCM devices is studied from both experimental and modeling viewpoints. First, VT is measured for PCM devices as a function of the programmed state, highlighting its scaling dependence in sub-deca-nanometer sized amorphous volumes. Experimental results are discussed in terms of a constant-power model for threshold switching based on the local heating of carriers [3]. Then, drift measurements have been carried out to evaluate the time evolution of resistance, sub-threshold slope and VT in a broad timescale, from about 1 μs to few days. After verifying the constant power model for switching [3], we show a new model for drift based on Poole Frenkel (PF) modeling of conduction [6] and on SR kinetics for drift, a common phenomenon in amorphous semiconductors [7, 8] and metallic glasses [9]. The model allows predicting the VT evolution with time based on the evolution of the activation energy for conduction in the amorphous chalcogenide material. A logarithmic increase of VT with time is evidenced within the model in agreement with experimental data over more than 10 decades of time. These results are discussed in terms of the evolution of the energy landscape for conduction in the amorphous chalcogenide [4]. CONSTANT THRESHOLD POWER CRITERION Measurements were performed on GST 90 nm cells [5] fabricated by Micron Laboratories. The cells in the experiments were put in two different amorphous states (a full reset state and a partial reset state) through a fast-quenched square pulse of different amplitudes. An IV sweep was then performed after different delay times. With this method we were able to observe the time behaviour of low-field resistance R (Fig. 2a), of threshold vo
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