Evaluation of Damages and Pore-sealing Capabilities of Oxidizing and Reducing Etch Plasmas for Single and Dual Damascene
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0914-F04-05
Evaluation of Damages and Pore-sealing Capabilities of Oxidizing and Reducing Etch Plasmas for Single and Dual Damascene Patterning of Porous Ultra-Low-k Materials Emmanuel Ollier1, Mathieu Clain2, Robert Fox2, Philippe Brun3, and Stephane Jullian1 1 Crolles2Alliance, Philips Semiconductors, 860, rue Jean Monnet, Crolles, 38920, France 2 Crolles2Alliance, Freescale Semiconductor, 870, rue Jean Monnet, Crolles, 38920, France 3 Crolles2Alliance, CEA - LETI, 17, rue des Martyrs, Grenoble, 38054, France
ABSTRACT This paper presents the evaluation of oxidizing and reducing plasmas for post etch poresealing treatments during patterning of interconnections in a porous Ultra Low-k (ULK) material. Morphological and chemical characterizations, as well as electrical results (resistance, capacitance, leakage, yield), are presented for both single and dual-damascene integrations. INTRODUCTION Sub 65nm technology nodes decrease capacitance by introducing porous ultra low-k (ULK) dielectric materials. This results in big challenges for via and line etch processes [1] [2] which must achieve very aggressive requirements in terms of morphology and control of critical dimensions as well as avoid dielectric damage. On porous SiOCH type materials, damages correspond to etch sidewall modifications which increase the k value and the capacitance between lines. In the presence of oxygen-containing reactive species, a carbon depletion occurs in the dielectric due to CH3 methyl groups substitution by polarized bonds. Moreover, the ULK material can also interact with subsequent processing, adding other k value degradations, such as moisture uptake and penetration of the metal barrier in the low-k pores [3]. New architecture schemes and processes have been developed for 65nm to avoid long low-k exposure to oxidizing dry stripping plasmas during photo resist removal [4]. For advanced nodes, plasma treatment is seen as an option to perform engineering of ULK line surfaces by realizing pore sealing [5]. It has specific advantages compared to other solutions including material deposition. Plasma treatment can potentially be done in the same process as via and line etch (in-situ), which provides fast cycle time, low cost, and avoids the exposure to air or wet chemistries before the treatment. This study shows the plasma chemistry screening that has been done to identify best gases for single damascene. Further, results on dualdamascene are presented to demonstrate the compatibility with the integration of all metal levels. EXPERIMENTS Experiments have been performed on 300mm wafers prepared according to a 65nm process flow using a PECVD porous ULK material with k=2.5 as deposited. The single and dualdamascene stacks are presented in Figures 1 and 2, respectively. For single damascene, the lines are patterned with photoresist on the metal hardmask which is then etched in a metal etcher. Finally, the dielectric stack is etched in an oxide etcher (Figure 1). For dual-damascene, the metal hardmask is first patterned and etched as for singl
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