Evaluation of novel carrier substrates for high reliability and integrated GaN devices in a 200 mm complementary metal-o
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esearch Letter
Evaluation of novel carrier substrates for high reliability and integrated GaN devices in a 200 mm complementary metal–oxide semiconductor compatible process S. Stoffels, K. Geens, X. Li, D. Wellekens, S. You, and M. Zhao, PMST, IMEC, Kapeldreef 75, Heverlee, Vlaams-Brabant, Belgium M. Borga, E. Zanoni, G. Meneghesso, and M. Meneghini, Dipartimento di Ingegneria dell’Informazione, University degli studi di Padova, Padova, Italy N.E. Posthuma, M. Van Hove, and S. Decoutere, PMST, IMEC, Kapeldreef 75, Heverlee, Vlaams-Brabant, Belgium Address all correspondence to S. Stoffels at [email protected] (Received 30 May 2018; accepted 29 August 2018)
Abstract In this paper new materials and substrate approaches are discussed which have potential to provide (Al)GaN buffers with a better crystal quality, higher critical electrical field, or thickness and have the potential to offer co-integration of GaN switches at different reference potentials, while maintaining lower wafer bow and maintaining complementary metal–oxide semiconductor (CMOS) compatibility. Engineered silicon substrates, silicon on insulator (SOI) and coefficient of thermal expansion (CTE)-matched substrates have been investigated and benchmarked with respect to each other. SOI and CTE-matched offer benefits for scaling to higher voltage, while a trench isolation process combined with an oxide interlayer substrate allows co-integration of GaN components in a GaN-integrated circuit (IC).
Introduction In recent years, GaN has come to the forefront as a key material for next-generation, energy-efficient power electronics. Power devices based on the wide-bandgap semiconductor material GaN can convert power far more efficiently than Si-based chips, due to their higher critical electrical field (Ec), faster switching speed, and lower on-resistance. At this moment, lateral GaN power devices are accepted as a breakthrough technology with disruptive performance. First demonstrators are available on the market from various suppliers, e.g., EPC, Panasonic, and GaN Systems. Most challenges for fabricating power devices on 200 mm GaN-on-Si substrates have been addressed such as device dispersion,[1,2] high-voltage operation,[1,2] e-mode operation,[1,2] and gate reliability.[3,4] One of the main challenges for the nextgeneration power devices is scaling the devices toward higher voltages and achieving a better reliability, enabling GaN to play a role in the important market of drive-trains.[5] Another important challenge is a tighter co-integration of power devices on-chip, together with parts of the driver integrated circuit (IC). Typically, these components are integrated as discrete components and interconnected on a package level. This leads to additional parasitics, which particularly for a high power, fast switching technology as GaN can lead to excessive ringing and associated energy losses. Integrating several components on-chip, i.e., creating a GaN-IC will reduce circuit parasitics and cost. It is the key to unleash the full potential of the GaN tec
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