GaP-based MIS Capacitors Using a SiN Gate Dielectric
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GaP-based MIS Capacitors Using a SiN Gate Dielectric A. Chen, J. Woodall, X.W. Wang, T.P. Ma Department of Electrical Engineering Yale University, 15 Prospect Street New Haven, CT 06511, U.S.A
Abstract Gallium Phosphide (GaP) Metal-Insulator-Semiconductor (MIS) capacitors were fabricated with synthesized SiN as the gate dielectric. The interface property and the SiN bulk quality were studied with capacitance- voltage (C-V) measurement s and current-voltage (I-V) measurements. The total interface state density of 3×1012 cm-2 and the fixed charge density in SiN of 7×1012 cm-2 were estimated from the C-V measurements. The leakage current density was as low as 15nA/cm2 at an effective electric field of 3MV/cm. The effective electric field in SiN at breakdown was as high as 10MV/cm. Constant current stress measurements showed bulk trap density of 2×1011 cm-2 in SiN, which is much lower than that for CVD SiN or SiO 2 . Introduction Gallium Phosphide (GaP), with a bandgap of 2.26 eV at room temperature, has been regarded as an excellent semiconductor material for high-temperature, high-power and low-noise applications. Due to its application in yellow/green LEDs, there are mature material processing and device fabrication technologies for GaP. Unlike other wide bandgap semiconductors like GaN and SiC, GaP substrates are commonly available at lower prices, which makes it a desirable choice for industrial products. However, for FET applications, a critical issue is the leakage current through the gate. A high quality gate insulator on GaP will help to reduce the dark current, and enable GaP MOS/MIS devices. GaP MOS/MIS structures can be made by the oxidation of GaP or the deposition of insulators on GaP. Both thermal oxidation of GaP at high temperature [1-3] and anodic oxidation of GaP at room temperature [4-9] have been studied, but none of them has produced the oxide with high enough quality for device applications. It was discovered that stress cracks and interfacial voids formed during GaP thermal oxidation even at the temperature as low as 600 °C to 800 °C, which hindered GaP thermal oxides from device applications [2]. Anodic oxidation of GaP was studied as another approach to fabricate GaP MOS. But GaP MOS with anodic oxide demonstrated significant instability in electrical characterization, possibly due to the high density of interface states and oxide charges. It is still argued weather or not GaP anodic oxides could have high enough quality for device applications. In this research, we have explored the feasibility of making high quality GaP MIS structures with synthesized gate dielectrics. The preliminary results have demonstrated that it is feasible to make GaP-based MIS devices with synthesized gate dielectrics.
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Experiment Al synthesized insulator p-type G
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