Impact of temperature and breakdown statistics on reliability predictions for ultra-thin oxides
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ABSTRACT This paper discusses the evolution in the degradation and breakdown behaviour of ultra-thin oxides when scaling the oxide thickness into the sub-4 nm range for future CMOS technology generations. It will be shown that changes in the breakdown statistics, which can be explained by a percolation model for breakdown, lead to an increased area dependence of the time-tobreakdown. This has to be taken into account when predicting the oxide reliability. Also the impact of the test methodology, the relevance of a so-called polarity gap in the charge-tobreakdown and its consequences for reliability testing, are highlighted. Moreover, a strong increase in the temperature dependence of breakdown, especially for sub-3 nm oxides, is demonstrated and the impact of temperature on trap generation and critical trap density at breakdown is discussed. Finally it is shown that the combined effects of all these phenomena might lead to oxide reliability becoming a potential showstopper for further technology scaling.
INTRODUCTION With the introduction of the 0. 181im technology generation in 1999 and the expected 0.13 ýtm generation by the year 2001, we are entering the Gigabit-scale Technology era. According to the 1997 SIA Roadmap these technology generations require gate dielectrics with an equivalent oxide thickness of less than 4nm, reaching 2.5 nm for the 0.13pm generation. The use of such thin SiO 2 gives rise to direct tunnelling currents, which increase exponentially with further
thickness reduction and will necessarily lead to a non SiO 2-era. This is almost certainly expected for the sub-0.1pin generations when a less than 1.5nm equivalent oxide thickness will be mandatory. Until then, SiO 2-1ike gate dielectrics will remain to be the material of choice, despite their shortcomings. This will result in the use of these materials close to their physical limits, while at the same time the requirements from reliability point of view are not relaxing, at the contrary. If we look at the evolution of the oxide electric fields over the past 3 decades, as is shown in Figure 1, we see a tremendous increase from below 1 MV/cm in the early seventies upto 6 MV/cm today. As a result of this, the time-dependent dielectric breakdown (TDDB) of ultra-thin oxides has become an important reliability issue for ULSI integrated circuits. Despite more than 3 decades of research into the degradation mechanisms of oxides, no clear consensus has been reached yet on the exact cause of the dielectric breakdown. Moreover, the breakdown mechanisms and characteristics are changing with the downscaling of the oxide thickness. In this paper, we will discuss the evolution in the breakdown behaviour of ultra-thin oxides when scaling the oxide thickness into the sub-4 nm range needed for future CMOS technology generations. It will be shown that changes in the breakdown statistics lead to an increased area dependence of the time-to-breakdown.
295 Mat. Res. Soc. Symp. Proc. Vol. 592 © 2000 Materials Research Society
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