Improvement of Wafer Edge Profile and CMP Performance Through the Floating Head Design
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IMPROVEMENT OF WAFER EDGE PROFILE AND CMP PERFORMANCE THROUGH THE FLOATING HEAD DESIGN Huey-Ming Wang*, Gerry Moloney*, and Mario Stella, Sesinando DeGuzman Cybeq Nano Technologies, 45 E. Plumeria Drive, San Jose, CA 95134 *Present Address: Multi Planar Technologies Inc., San Jose, CA 95134 ABSTRACT
The dependence of IC fabrication on the Chemical Mechanical Planarization (CMP) process increases as the device features go down to 0.25 micron or beyond. Due to the tighter CMP process spec, it is very important to reduce the within wafer non-uniformity (WIWNU%) to achieve higher process yield. The symmetrical increment of linear velocity at wafer edge is not sufficient to change wafer edge profile by breaking the matched speed rule. A better solution is through the change of head design for a fixed platen from the polisher design point of view. This study demonstrates the improvement of the CMP process performance, especially at the wafer edge, from the modification of the floating type polish head. The best WIWNU% from a single air chamber head is about 5.12% at 6-mm edge exclusion (EE). In order to obtain better pad deformation control, the retaining-ring pressure chamber is separated from that of the subcarrier. The average WIWNU% is about 4% for 3-mm and 5-mm EE from two-pressurechamber head. Due to the limitation of retaining-ring pressure effect, a third pressure chamber is further added that can be extended the edge control up to 1 inch from the wafer edge. The WIWNU% is about 3.8% at 5-mm edge exclusion with low down forces. The slurry and insert types also show effect on the wafer edge profile. It has been also proven that this three-pressurechamber head is able to reduce the post-CMP thickness variation from the ILD production wafer, especially at wafer edges. More detailed information and CMP mechanism will be discussed in this paper. INTRODUCTION The Chemical Mechanical Planarization (CMP) process, consists of both chemical and mechanical reactions, can generate flat wafer surface due to its an-isotropic nature; therefore, the need of CMP process increases as device feature decreases and integration layer increases.1 In order to reduce the cost of the chips, the demand of the yield from available dices in each wafer increases also. The reduction of the WIWNU% at small edge exclusion is one of the important factors to achieve higher process yield. The polish mechanism is that abrasive particles and pad materials contribute to the mechanical removal of wafer surface materials (either dielectric or metal) with the help of slurry chemistries and abrasive surface chemistry.2,3 Basically the polisher should offer uniform mechanical contact surfaces across both sides of wafer surfaces to obtain homogeneous removal rates. Several researchers have proposed varied removal rate models based on Preston equation. that are all related to down force and linear velocity.4,5 For polisher with rotational platen, the relative linear velocity (LV) to the pad surface at varied position (rw) on wafer surface can be expressed as
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