Inserting Different Charge Regions in Power MOSFET for Achieving High Performance of the Electrical Parameters
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ORIGINAL PAPER
Inserting Different Charge Regions in Power MOSFET for Achieving High Performance of the Electrical Parameters Mahsa Mehrad 1 Received: 17 January 2020 / Accepted: 22 April 2020 # Springer Nature B.V. 2020
Abstract In this paper a new lateral double diffused MOSFET is proposed which has better performance compared to the conventional MOSFET. The idea is applied by inserting two silicon windows in drift region near the drain and under this region. The window in the drift region has higher doping density that leads to reducing the on-resistance as an important parameter in LDMOSFETs. The silicon window in buried layer has higher thermal conductivity than insulator which leads to reducing the self heating effect. Moreover, inserting the windows leads to increasing the breakdown voltage. Improving the parameters in the proposed structure causes better drain current. Keywords Semiconductor devices . Power MOSFET . LDMOSFET . Breakdown voltage . On-resistance
1 Introduction Metal Oxide Semiconductor Field Effect Transistor (MOSFET) is one of the most important inventions in electronic industry [1]. MOSFETs are widely used in integrated circuits (ICs) because of their properties that can act as transistors, resistors, diods and switches [2–5]. P-MOSFET and N-MOSFET are complementary transistors used in CMOS circuits to increase the density of transistors in ICs and reduce the electricity consumption [6–8]. Silicon on Insulator (SOI) technology can increase the MOSFETs performance [9–11]. In this technology, the effect of parasitic capacitance are leakage current are reduced, and the latch up phenamena is violated and the power consumption is decreased. So, SOI MOSFET is a good choice in integrated circuits. In many applications, MOSFET with high breakdown voltage is needed [12–15]. So, Laterally Double Diffused Metal Oxide Semiconductor Field Effect Transistors (LDMOSFETs) are introduced satisfying high voltages [16, 17]. However, Onresistance is high in these transistors. Moreover, the efforts for increasing the breakdown voltage may lead to increasing the On-resistance. Many researches have been accomplished * Mahsa Mehrad [email protected] 1
School of Engineering, Damghan University, Damghan, Iran
during last decade to introduce LDMOSFETs with high breakdown voltage and smaller on-resistance [18–24]. The researches for increasing the breakdown voltage and increasing the on-resistance is ongoing. In this paper, a new structure for trench oxide LDMOS is proposed to improve the lattice temperature with higher breakdown voltage. So, some great changes are considered in the new structure that makes it more reliable than the conventional LDMOS. In the new structure, a small N+ is located in the active region near the drain and the bigger one is incorporated in the buried oxide (BOX) which reduces lattice temperature. So, the new structure is called Double N+ Windows-LDMOS (DNW-LDMOS). The simulation with two dimensional ATLAS simulator [25] shows that DNW-LDMOS can effectively reduce the lattice temperatur
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