Integrated MEMS Technologies
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Integrated MEMS Technologies
Andrea E. Franke, Tsu-Jae King, and Roger T. Howe Introduction While microelectromechanical systems (MEMS) technology has made a substantial impact over the past decade at the device or component level, it has yet to realize the “S” in its acronym, as complex microsystems consisting of sensors and actuators integrated with sense, control, and signal-processing electronics are still beyond the current state of the art. There are several incentives to co-fabricate MEMS devices and electronics on a single silicon chip, which apply to applications such as inertial sensors. The parasitic resistance and capacitance associated with the interconnects between the MEMS devices and electronics degrade electrical signal quality and hence degrade system performance. This problem is critical for thin-film, surfacemicromachined devices in which changes in position are sensed as a small, capacitively induced current. If the MEMS devices can be co-fabricated with electronics on a single chip, the parasitic resistance and capacitance of these components can be greatly reduced. The elimination of chipto-chip interconnections can also lead to more reliable packages. This is especially important for large arrays of MEMS devices that require independent addressing of each element, such as the micromirrors in an optical cross-connect switch, for which the monolithic integration of switching electronics can reduce the number of offchip connections by orders of magnitude. Depending on the integration strategy that is adopted, the co-fabrication of microstructures and electronics on the same substrate may provide significant overall cost savings. This article surveys three approaches to integrating MEMS with electronics by means of co-fabrication in a single process sequence: MEMS process steps completed before the electronics process steps, MEMS process steps interleaved with the electronics process steps, and MEMS process steps done after the electronics process steps.
MRS BULLETIN/APRIL 2001
Several issues must be considered in developing an integrated MEMS process. The first is the process-temperature constraint imposed by Al- or Cu-based integratedcircuit (IC) metallization. Depending on the particular interconnect metallurgy used, the maximum post-metallization temperature is in the range of 400–550C. A second issue is the relatively thick MEMS structural and sacrificial layers (2–10 m thick), which create significant height variations on the wafer surface. Highresolution lithography, which is needed for submicron CMOS (complementary metal oxide semiconductor) transistors is not possible on such rough surfaces. Electrical interconnects between the MEMS and electronics are also an important consideration, since they should be of a minimum length and made in a highly conductive layer to minimize parasitic resistance and capacitance. Finally, the protection of on-chip electronics from the MEMS release etchant may be necessary. For example, hydrofluoric acid (HF) is typically used to remove sacrificial ox
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