ITO-Channel Ferroelectric-Gate Thin Film Transistor with Large On/off Current Ratio
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0997-I06-01
ITO-Channel Ferroelectric-Gate Thin Film Transistor with Large On/off Current Ratio Eisuke Tokumitsu, Masaru Senoo, Etsu Shin, and Tomofumi Fujimura Tokyo Institute of Technology, Yokohama, 226-8503, Japan ABSTRACT Indium tin oxide (ITO)-channel ferroelectric-gate thin film transistor (TFT) with large on/off current ratio is demonstrated by using mechanical polishing process to planarize the surface of ferroelectric bottom gate insulator (Bi,La)4Ti3O12 (BLT). It is shown that the mechanical polishing of the sol-gel derived polycrystalline ferroelectric BLT films causes no degradation in electrical properties. ITO channel layer was then deposited on the planarized BLT gate insulator to fabricate ferroelectric-gate TFTs. The off-current of the ITO/BLT TFT fabricated with the polishing process is drastically reduced to around 10-12 A, which is four orders of magnitude lower than that of the TFT fabricated without the polishing process. The obtained on/off current ratio is more than 107. In addition, a subthreshold voltage swing as small as 200 mV/decade was obtained. INTRODUCTION Ferroelectric random access memory (FeRAM) is promising for a low-powerconsumption nonvolatile memory applications which is used in mobile communication tools and wireless IC cards and so on [1,2]. In particular, FeRAM with ferroelectric-gate transistors [3,4], non-destructive readout can be realized and it has an advantage for high-density implementation, because of the scalability of the ferroelectric-gate transistor. However, in Si-based ferroelectricgate transistors, it is very difficult to obtain good electrical properties at the silicon-ferroelectric layer, because the ferroelectric films need high temperature annealing for the crystallization, which usually results in thick interfacial layer between ferroelectric film and Si with poor electrical properties. In addition, we have pointed out the ìcharge-mismatch problemî in Sibased ferroelectric-gate transistors [3,4]. Although the remanent polarization of most ferroelectric materials are more than 10 µC/cm2, the charge density required to control the channel conductivity of Si MOSFET is usually around or less than 1 µC/cm2. We have previously proposed a new nonvolatile ferroelectric-gate device which has a thin conductive oxide as a channel instead of silicon surface in conventional MOS structure [5-8]. In such a thin film transistor (TFT), we expect to use full polarization of the ferroelectric gate insulator and the charge mismatch problem can be suppressed. Hence, good data retention characteristics are expected. We already demonstrated nonvolatile memory operations of ferroelectric-gate TFTs using indium tin oxide (ITO) as a channel material and sol-gel derived Pb(Zr,Ti)O3 (PZT) and (Bi,La)4Ti3O12 (BLT) films as a ferroelectric-gate insulator [6]. These ferroelectric-gate insulators can operate at low voltage (less than 10 V) and exhibit a large oncurrent (mA range) [5-8]. It is interesting to note that the ITO channel has high carrier
concentration. Since a ferroelect
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