Lanthanum Oxide Capping Layer for Solution-Processed Ferroelectric-Gate Thin-Film Transistors
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Lanthanum Oxide Capping Layer for Solution-Processed Ferroelectric-Gate Thin-Film Transistors Tue T. Phan1, Trinh N. Q. Bui2, Takaaki Miyasako2, Thanh V. Pham1, Eisuke Tokumitsu2,3, and Tatsuya Shimoda1,2 1 School of Materials Science, Japan Advanced Institute of Science and Technology, 1-1 Asahidai, Nomi, Ishikawa 923-1292, Japan. 2 Japan Science and Technology Agency, ERATO, Shimoda Nano-Liquid Process Project, 2-5-3 Asahidai, Nomi, Ishikawa 923-1211, Japan. 3 Precision and Intelligence Laboratory, Tokyo Institute of Technology, 4259-R2-19 Nagatsuta, Midori-ku, Yokohama 226-8503, Japan.
ABSTRACT We report on the use of La2O3 (LO) as a capping layer for ferroelectric-gate thin-film transistors (FGTs) with solution-processed indium-tin-oxide (ITO) channel and Pb(Zr,Ti)O3 (PZT) gate insulator. The fabricated FGT exhibited excellent performance with a high “ON/OFF” current ratio (ION/IOFF) and a large memory window ( Vth) of about 108 and 3.5 V, respectively. Additionally, a significantly improved data retention time (more than 16 hours) as compared to the ITO/PZT structure was also obtained as a result of good interface properties between the ITO channel and LO/PZT stacked gate insulator. We suggest that the LO capping layer acts as a barrier to prevent the interdiffusion and provides atomically flat ITO/LO/PZT interface. This all-oxide FGT device is very promising for future ferroelectric memories. INTRODUCTION All-oxide ferroelectric-gate thin-film transistors (FGTs) are very promising and have drawn much attention for ultimate system-on-panel or system-on-film applications [1-11]. In particular, the use of indium-tin-oxide (ITO) as a channel layer and ferroelectric (Bi,La)4Ti3O12 (BLT) or Pb(Zr,Ti)O3 (PZT) film as a gate insulator has been demonstrated as promising candidates for these targets [6-9,11]. Generally, the use of PZT is preferred to BLT because of its advantages, such as higher remanent polarization, lower crystallization temperature and more flat surface. However, component interdiffusion between solution-processed ITO and PZT layers severely occurs resulting in a degradation of both ITO crystalline quality and ITO/PZT interface properties. As a result, most of these FGT memories exhibit very poor retention property, which is the main obstacle for practical use of it. Thus, preventing the interdiffusion is crucial to realize a good interface property which must be indispensable for obtaining good retention characteristics. In the case of Si-based metal-ferroelectric-semiconductor (MFS) memory, an insulator (I) buffer layer is often used to form the MFIS structure so that the interdiffusion or reaction between the ferroelectrics and Si substrate is hindered [12,13]. For our FGT structure, a capping layer can also be considered to prevent the interdiffusion. Lanthanum oxide (LO), a well-known high- dielectric material, has a tetragonal structure with a lattice constant (3.937-4.05 Å) close to that of PZT (4.03 Å) [14]. It is also thermodynamically stable without forming an interface layer when placed i
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