Microelectronic Test Structures for CMOS Technology
Microelectronic Test Structures for CMOS Technology and Products addresses the basic concepts of the design of test structures for incorporation within test-vehicles, scribe-lines, and CMOS products. The role of test structures in the development and moni
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Manjul Bhushan · Mark B. Ketchen
Microelectronic Test Structures for CMOS Technology
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Manjul Bhushan IBM Systems & Technology Group Hopewell Junction, NY 12533, USA [email protected]
Mark B. Ketchen IBM T.J. Watson Research Center Yorktown Heights, NY 10598, USA [email protected]
ISBN 978-1-4419-9376-2 e-ISBN 978-1-4419-9377-9 DOI 10.1007/978-1-4419-9377-9 Springer New York Dordrecht Heidelberg London Library of Congress Control Number: 2011934043 © Springer Science+Business Media, LLC 2011 All rights reserved. This work may not be translated or copied in whole or in part without the written permission of the publisher (Springer Science+Business Media, LLC, 233 Spring Street, New York, NY 10013, USA), except for brief excerpts in connection with reviews or scholarly analysis. Use in connection with any form of information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed is forbidden. The use in this publication of trade names, trademarks, service marks, and similar terms, even if they are not identified as such, is not to be taken as an expression of opinion as to whether or not they are subject to proprietary rights. Printed on acid-free paper Springer is part of Springer Science+Business Media (www.springer.com)
Preface
Test structures are widely used in all manner of scientific and technological endeavors. Their role in the development and monitoring of technology and its applications in the specific area of microelectronics has become ever more important as the technology becomes more complex and expensive, while market demands exert downward pressure on product prices. Scaling of complementary metal oxide semiconductor (CMOS) technology to ever smaller dimensions, large investments in silicon manufacturing lines, and the race to follow Moore’s law to its ultimate limits have driven special attention to test structures. In addition to sessions at many conferences with themes of microelectronic design, development, and manufacturing, the IEEE sponsors a conference fully devoted to microelectronic test structures, the International Conference on Microelectronic Test Structures (ICMTS), with participants from industry, universities, and research laboratories from across the Americas, Europe, and Asia. In recent years, several small companies marketing test chips along with data analysis services have emerged to assist larger companies engaged in CMOS technology development and manufacturing. With backgrounds in low temperature physics, much of our earlier experience in research and development was in the area of superconducting devices and circuits for magnetic and high-frequency digital and analog applications. Prior to our work on test structures for CMOS technologies, we collectively worked in various capacities on a wide range of other large and small projects, from optoelectronics and photovoltaics to silicon bipolar and CMOS devices and fabrication, with some continued involvement in basic and applied res
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