CMOS Test and Evaluation A Physical Perspective
This book extends test structure applications described in Microelectronic Test Structures for CMOS Technology (Springer 2011) to digital CMOS product chips. Intended for engineering students and professionals, this book provides a single comprehensive s
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CMOS Test and Evaluation A Physical Perspective
CMOS Test and Evaluation
Manjul Bhushan • Mark B. Ketchen
CMOS Test and Evaluation A Physical Perspective
Manjul Bhushan OctEval Hopewell Junction, NY, USA
Mark B. Ketchen OcteVue Hadley, MA, USA
ISBN 978-1-4939-1348-0 ISBN 978-1-4939-1349-7 (eBook) DOI 10.1007/978-1-4939-1349-7 Springer New York Heidelberg Dordrecht London Library of Congress Control Number: 2014952022 # Springer Science+Business Media New York 2015 This work is subject to copyright. All rights are reserved by the Publisher, whether the whole or part of the material is concerned, specifically the rights of translation, reprinting, reuse of illustrations, recitation, broadcasting, reproduction on microfilms or in any other physical way, and transmission or information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed. Exempted from this legal reservation are brief excerpts in connection with reviews or scholarly analysis or material supplied specifically for the purpose of being entered and executed on a computer system, for exclusive use by the purchaser of the work. Duplication of this publication or parts thereof is permitted only under the provisions of the Copyright Law of the Publisher’s location, in its current version, and permission for use must always be obtained from Springer. Permissions for use may be obtained through RightsLink at the Copyright Clearance Center. Violations are liable to prosecution under the respective Copyright Law. The use of general descriptive names, registered names, trademarks, service marks, etc. in this publication does not imply, even in the absence of a specific statement, that such names are exempt from the relevant protective laws and regulations and therefore free for general use. While the advice and information in this book are believed to be true and accurate at the date of publication, neither the authors nor the editors nor the publisher can accept any legal responsibility for any errors or omissions that may be made. The publisher makes no warranty, express or implied, with respect to the material contained herein. Printed on acid-free paper Springer is part of Springer Science+Business Media (www.springer.com)
Preface
Designing, fabricating, and testing of CMOS chips is a multi-billion dollar industry, spanning a multiplicity of engineering fields. Many of the complex tasks at each stage of design and production are handled with automated tools enabling rapid deployment of semiconductor chips in the marketplace at a low cost. Significant engineering resources are devoted to the development of these tools and in generation of associated software. Often engineers engaged in designing and testing of chips rely on automated tools and have limited exposure to the physical behavior of devices and circuits. Generally well proven and efficient, this approach lacks full utilization of university classroom learning in physics and engineering. Although detailed kn
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