Novel Methods of Nanoscale Wire Formation
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BULLETIN/AUGUST 1999
This technique involves the formation of a pattern on a material and the transfer of this pattern to form nanometer-sized features. In general, the pattern is formed by selective irradiation of a photoresist, using electrons, ions, or ultraviolet light; the patterned regions of the resists are then dissolved in a specific solvent. The final nanoscale features are formed in the underly ing material by the use of dryetching techniques such as reactive ion etching (RIE), electron cyclotron resonance (ECR) etching, chemically assisted ion-beam etching (CAIBE), and reactive ion-beam etching (RIBE). Although this process can lead to the fabrication of relatively small lines,9 these techniques are still not capable of producing structures with dimensions in the single-digit-nanometer ränge, especially on a large scale. Scanning-tunnelingmicroscopy (STM) and atomic-forcemicroscopy (AFM) fabrication techniques can achieve these d i m e n s i o n s , 1 0 " but large-area patterns produced in this fashion would be time-prohibitive. More important, the Standard processes that define these nanostructures take advantage of dry-etching techniques, which involve the removal of material. This is not only a violent process, but also an imprecise one. This becomes especially important in the case of semiconductors, in which the etching can lead to significant surface and subsurface damage, resulting in poor electronic and optical properties. 1 2 For example, it has been shown that ECR-etched n + -GaAs quan tum wires can "pinch out" (that is, their conductance goes to zero) below 50 nm, even when Cl-passivated. 1 3 Resolving this and other important issues, including elimination of the damage, is under current investigation. T h u s the ability to form nanoscale
structures, including wires or arrays, without the aid of ex situ techniques such as dry etching is a desirable alternative that may have applications in future device design a n d / o r fabrication. These techniques involve the formation and characterization of natural-forming ID nanostructures, taking advantage of al tered surface structures, reduced surface energetics, stress, self-limiting processes, or depositions into predefined structures to achieve the aim of forming macroscopic arrays or bulk quantities of such wire structures. However, in order to achieve the required growth control and produce high-quality materials, it is necessary to have an understanding of these processes at a fundamental level. It is the aim of this issue of MRS Bulletin to present several novel and interesting techniques used to obtain naturally designed wire structures in a variety of materials Sys tems, including semiconductors, metals, and ceramics. The first technique of interest involves growth on stepped surfaces, where the surface is used as a template. In this pro cess, deposited atoms, if properly chosen, will adsorb at the Step edges, leading to arrays of I D chains on such surfaces, as in the case of Ca and AI chains on Si(112).14 Continuing this process can
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