Optimizing Fabrication of Buried Oxide Channel Field Effect Transistors
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gate oxide channel \ Mott channel laye
insulating substrate
drain
source
(STO) Fig. 1. Schematic representation of the OxFET structure with the buried channel layer Kawasaki and coworkers [3] have demonstrated that surface termination plays a substantial role in addition to atomic smoothness of the perovskite substrates in obtaining perfect two dimensional epitaxy of the heterostructures used in the current architecture. It is well known that substrates with the highest degree of smoothness are obtained through an etching process which 25
Mat. Res. Soc. Symp. Proc. Vol. 623 © 2000 Materials Research Society
leaves a STO substrate terminated in Ti [4]. Unfortunately, titanium termination leads to precipitates in the epitaxially grown cuprates[3]. These precipitates are very detrimental to the performance of our second architecture devices because they could lead to grain boundaries in the channel and in addition, they could protrude through the gate oxide film and become the locus for short circuits between the source/drain and the gate. In this paper we assess the role of the STO substrate surface termination on the electronic conductivity of the channel films, and we report on the methods utilized in order to produce strontium terminated surfaces for fabrication of OxFET's with high quality channels. Furthermore, we report on different possible paths to achieve a gate oxide with high dielectric constant and high breakdown voltage. EXPERIMENT AND RESULTS Processing steps and measurements As it has been already described in more detail in Ref, [1], the fabrication of our OxFET devices starts with the first metallization layer (M 1), deposited through a lithographic mask on a STO substrate which had undergone the Kawasaki process [4] by the vendor. In order to produce a Sr terminated surface for the subsequent growth of the channel film, we used to deposit about a monolayer of SrO [3] by ablating from a Sr peroxide target. However, this method was not convenient for our La2CuO 4 (LCO) channel because it produced Sr doping at the substrate/channel interface, and the conductive La,aSrCu0 4 interfacial layer was detrimental to the switching of the channel. Serendipitously, we discovered a facile and benign method of preparing Sr terminated surfaces in STO by a mild 02 ash, which we will discuss in the next section. Typically, following the ultrasound cleaning after the M l lift-off, the sample undergoes a mild reactive ion etching (ashing) in 02. This is accomplished in a parallel plate, reactive ion etching tool, model Jupiter III plasma system. Its chamber dimensions are 25 cm diameter x 3.25 cm high. We use flowing 0 2 at 500 mtorr, and 50 watts of power at 13.56 MHz. The substrate is then introduced into the deposition chamber where the channel layer and the gate insulator are sequentially deposited by pulsed layer deposition (PLD), following the interval deposition method [6], and with the substrate held at 750 ' C. Prior to deposition, the sample is annealed at 700 ° C for 3 hr. in vacuum followed by 1 hr i
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